Mar 30, 2007 #1 C choplin Junior Member level 1 Joined Jan 4, 2005 Messages 17 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 131 I want to design a UART from APB. This is my firt Verilog HDL design.I don't known how to strat my work.thank for your advise!
I want to design a UART from APB. This is my firt Verilog HDL design.I don't known how to strat my work.thank for your advise!
Mar 30, 2007 #2 L learnbydo Junior Member level 2 Joined Jun 18, 2005 Messages 22 Helped 1 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,408 About UART Design First read the specification of UART and be familar with the timing. Then think the hardware architecture and memory map registers. state machine can simplize you thinking but may not be the best way. you can try shift register + control logic
About UART Design First read the specification of UART and be familar with the timing. Then think the hardware architecture and memory map registers. state machine can simplize you thinking but may not be the best way. you can try shift register + control logic