guesswho
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Problem Statement: Convert the last three digits of your registration number into binary. Take the ten least significant bits as ten independent inputs to an ASIC ‘I9, I8, I7, I6, ……,I0’. Let the eleventh input be reset ‘RST’; the twelfth input be clock ‘CLK’ and the thirteenth input be output enable ‘OE’. There are two outputs of this ASIC namely select ‘SEL’ and ‘OK’. ‘SEL’ is a registered output, while all the inputs and ‘OK’ are simple combinatorial IOs. All the IOs are in positive logic.
You are to implement the following equations, using various kinds of ASICs.
SEL** = I9.I8.I7.I6.I5.I4.I3.I2.I1.I0
(invert the input bits which are zero in your reg. #, so that when your reg. # appears at the inputs, ‘SEL**’ turns ‘1’)
(@ positive edge of CLK) SEL* (q) = SEL** (D)
SEL = SEL*./OE
OK = SEL*./RST./OE
For details ...
File attached with this post.
plzzzzzzzz help
Help Needed in doing a question.
Problem Statement: Convert the last three digits of your registration number into binary. Take the ten least significant bits as ten independent inputs to an ASIC ‘I9, I8, I7, I6, ……,I0’. Let the eleventh input be reset ‘RST’; the twelfth input be clock ‘CLK’ and the thirteenth input be output enable ‘OE’. There are two outputs of this ASIC namely select ‘SEL’ and ‘OK’. ‘SEL’ is a registered output, while all the inputs and ‘OK’ are simple combinatorial IOs. All the IOs are in positive logic.
You are to implement the following equations, using various kinds of ASICs.
SEL** = I9.I8.I7.I6.I5.I4.I3.I2.I1.I0
(invert the input bits which are zero in your reg. #, so that when your reg. # appears at the inputs, ‘SEL**’ turns ‘1’)
(@ positive edge of CLK) SEL* (q) = SEL** (D)
SEL = SEL*./OE
OK = SEL*./RST./OE
For details ...
File attached with this post.
plzzzzzzzz help