Help me make a peak value detector

[garg29]

short pulse nand monostabile

dear friends
m trying to design a circuit which can give me a pulse at positive 90 degree shoot up.
i mean to say that i have a sign wave signal of frequency range 15hz to 40 hz. and amplitude of 10mV to 1 V. when ever the signal reaches its peak value i have to generate a pulse.how to do this.

it is on same basis as that of zero crossing detector,the circuit detects the zero cross while in my case i have to detect the peak value.

please do help me.

thankyou
with best regards
amit.

 

[XNOX_Rambo]

74ls123 pulsgenerator

A hint: http://ecircuitcenter.com/Circuits/opdfr/opdfr.htm

 

[the tran]

Re: peak value detector.

What is nature of your design (Analog/Digital)?
Anyway, if only analog, then use few OpAmps and 555 or flip flop. It will do the job.
If Digital then you can use one Opamp config as comparator and an MCU with ADC and Timer. Hope this helps.

 

[garg29]

peak value detector.

Thanks for replying. "The tran" can you please explain the same a bit more. or if you are having a circuit diagam and if you could please share it with me i'll be much more comfortable.

Thanks,

with best regards,
Amit

 

[IanP]

Re: peak value detector.

Oher option is to build a PLL circuit with 2 x your frequecy and generate short pulse every second falling edge. This circuit will follow 15 -40Hz and on top of this will be amplitude indepandant ..
Solution with a comparator is useless when input signals have different voltage levels ..

 

[garg29]

peak value detector.

thanks IanP
can u give me the circuit daigram for the above.which PLL to use (565) . m new tp pll please help me.
and also as far as i know the pll takes square wave as input if i m not wrong......mine is a sine wave input signal
waiting for reply
amit.

 

[IanP]

Re: peak value detector.

You can use 565.
From its data sheet you will find that the input sensitivity for the "locked" stage is somewhere about 50mV (shape doesn't matter).
See the application on the frequency multiplier: instead of 7490 (division by 10) you can use any D-Flipflop in division by 2 configuration (7474, ..) and as a pulse generator you can use 74123, 555 or any other monostabile ..

**broken link removed**

 

[XNOX_Rambo]

Re: peak value detector.

Apparently my hint didn't trigger any reaction...

Well, here's another hint:
If you take the derivative of a sine you get a cosine, which is 90° out of phase
with the sine and crosses zero at the peak of the sine.
And you already knew how to make a zero-crossing detector, right?

/Rambo

 

[artem]

peak value detector.

The peak of signal can be taken if signal derivative calculation is done . When derivative chnages its sign from positive to negative - that is the peak value of your signal . It can be implemented as sample and store circuit . Check sampled value towards current value by comparator . When comparator output changes - get peak value from sampled store (could be capasitive analog store or digital store in mcu) .
but you have to estimate your sampling frequency to get proper peak value . Method with capasitive - resistor derivate calculation can be implemented for fixed frequency only .

 

[nand_gates]

Re: peak value detector.

Hi,
I think the best option is use ADC to sample ur signal. Then digitally integrate the
signal. (instead of diffrentiationg it as per suggested by "artem" this is because
differentiation will amplify the noise. ). If you integrate sine wave you will get a cosine
wave. Now for this cosine wave check for +ve to -ve crossing point here you have
to set ur pluse signal. You can reset ur pulse signal after some pluse width time has
elasped. All this you have to do in software!
Hope this helps!

 

[VVV]

Re: peak value detector.

Here is one approach, using a PLL.

In this circuit the PLL runs at 4x the input frequency. Then you divide it by 4 using a 74HC74 in such a way as to produce two 90deg out of phase signals, with 50% duty-cycle. Thus, one of the signals is synchronous with the zero-crossings, the other with the peaks of the input sinewave.

The signal is first amplified and limited, to deal with varying amplitude. The second opamp is used as a comparator. You may need to adjust the hysteresis, to get as close a signal to zero-crossing (and peak) as possible.

The PLL was designed in a hurry, so you may want to double-check the values.

The NAND gates are used to detect if the PLL is locked and only output the signal if the PLL is locked. So with no input signal you will get no output.

Good luck!