Re: peak value detector.
Here is one approach, using a PLL.
In this circuit the PLL runs at 4x the input frequency. Then you divide it by 4 using a 74HC74 in such a way as to produce two 90deg out of phase signals, with 50% duty-cycle. Thus, one of the signals is synchronous with the zero-crossings, the other with the peaks of the input sinewave.
The signal is first amplified and limited, to deal with varying amplitude. The second opamp is used as a comparator. You may need to adjust the hysteresis, to get as close a signal to zero-crossing (and peak) as possible.
The PLL was designed in a hurry, so you may want to double-check the values.
The NAND gates are used to detect if the PLL is locked and only output the signal if the PLL is locked. So with no input signal you will get no output.
Good luck!