Help me make a 1394b PHY design

[raymond_luo2003]

1394b PHY design

Hi, all,

I recently get a task for 1394b PHY design, it seems a huge and tough task for me since I will firstly define the architecture of that PHY, and will scratch the schematic by my hand from nothing. What I have is the 1394-1995, 1394a and 1394b standard. It seems there are no much available stuff for my architecture and design from website.

Does anyone have the experience on that PHY, any related documents and clues for that PHY definition and design will be great help for me.

Thanks in advance!
Raymond

 

[andy2000a]

1394b PHY design

1394 have many speed speci , 400M -> 800M
and you should find 1394 speci first , then you can
know , 1394 PHY have "strobe" like signal . it is easy design than USB2.0 (USB 2.0 only one signal
need recovery circuit recovery data ) , but as I know , 1394 have "strobe or clock " like signal .

 

[raymond_luo2003]

Re: 1394b PHY design

Hi, Andy,

Thank you in deed.

Actually I am working on 1394b now. It seem that we do need the clock data recovery for 1394b beta port since there is no longer clock signal available there.
ANd also there is a spec mention about 100ppm frequency difference between transmitter clock and receiver clock, how do you handle that one when you try to re-synchronize the incoming data with one frequency to the local clocck but with different frequency? Any reference papers?

Thanks in advance!
Raymond

 

[wencent]

Re: 1394b PHY design

Hi,

It is often the case in data communication that two systems on both side have similar clock frequency with small offset.

One way to overcome this problem is by nyquist sampling and introduce a circuitry called "elastic buffer" or "elasticity buffer" to obsorb those 'extra' or 'missing' chips.

Another way to do it is by oversampling.

Hope that helps,

Wencent

 

[mobile-it]

Re: 1394b PHY design

did you make some advance in your project? I am very interested in 1394 technology

 

[vbhupendra]

Re: 1394b PHY design

I have been involved in 1394a PHY design. The main challange was the design of LVDS trasmitter/receiver.

 

[andy2000a]

Re: 1394b PHY design

as I remember , USB no clock base -> need data recovery tech for
signal/data recovery
(serial ATA also have this problem )

but 1394 have strobe signal like "clock"

about LVDS design , simple design use
"invert series Resistor" --> poor in corner model

because LVDS have define Rin Rout swing ..
good design will use regulator control "common volt 1.25v"

you can find LVDS driver chip , you can know who to design it .

some DVD read chip already use LVDS format ..