Help me improve phase margin of LDO with buffer

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jutek

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hello

The LDO consists simple OTA as an error amplifier and opamp as a buffer, but not in a unity configuration, but with a gain 10V/V. i need it, cause i have low vdd=1.3 and high threshold voltages.

the buffer is to move second pole to higher frequencies. The problem is phase margin.
I know that gain falls 20dB/dec with every pole, but how fast phase does ?

i've decided to use this configuration to lower quiescent current cause i can use ota with much lower bias current than without buffer, to ensure proper transient response.

How to improve this phase margin?

any comments about this solution appreciated

regards
 

LDO with buffer

The phase falls with 45 degrees/dec
 

Re: LDO with buffer

Try to use source follow for buffer design.
 

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