Help me design a differential CMOS logic circuit

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khouly

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differential CMOS logic

i want to design a differential CMOS logic circuits to use it in hig speeed frequency divider about 4 to 5 GHz ,
is there any one can help and share knowledge
 

Re: differential CMOS logic

u can design such deviders by CML (Current Mode Logic) which consumes alot of power at such high frequency.I think u can design such divier efficiently ONLY in 0.13um CMOS process.
if u can use a divide by two first the work will be easier by 2.5GHz.
a kind of low power high quality divider called "injection Locked" can be used.this method works in 0.25um process very good!
see also:
**broken link removed**
**broken link removed**


BEST!
 

Re: differential CMOS logic

yes i know CML , and i want to design it in process .35 micron
but donot find good resource about it

about the power issue i think if the voltage swing of the logic is small the power consumption well be low

thanks
 

Re: differential CMOS logic

I think it is very difficult for you to design such high frequency serdes
using .35 technology.
 

Re: differential CMOS logic

zyphor said:
I think it is very difficult for you to design such high frequency serdes
using .35 technology.
Click to expand...

it depends. for receiver data recovery, the practical limit (not theoretical)
for .25u is about 4GHz, of course, nobody will be doing this in .35u.
I have no idea how far can one goes if it's just for frequency divider.

casual3
 

Re: differential CMOS logic

khouly said:
yes i know CML , and i want to design it in process .35 micron
but donot find good resource about it

about the power issue i think if the voltage swing of the logic is small the power consumption well be low

thanks
Click to expand...

I might be able to help you. I am doing something similar. You will need something more like 0.13u. Send me a message and I'll try to forward you what I have. Maybe we can share our collective knowledge.
 

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