Nested FOR loops
Hi:
I'm using Nested FOR loops with conditional IF statementsto test some conditions.The code is being compiled without any errors.
But,at the end of simulation none of the signals are updated.I'm not sure what the probelm is?I would really appreciate any help
in solving this problem.Below is the code,I'm working on. The cdata and sdata values are updated before this process starts.
constant p : integer := 2;
constant blksize : integer := 2;
type p_array is array (0 to 3) of integer range 0 to 255;
signal pvec : p_array := (0 => 1, 1 => 2, 2 => 3, 3 => 4);
signal sdata : data_array;
signal cdata : data_array;
type data_array is array (0 to 7,0 to 7) of std_logic_vector(7 downto 0);
signal data1 : data_array := (others => (others => "00000000"));
signal blks_horiz : integer := 4;
signal blks_verti : integer := 4;
type blk_size is array (0 to 1,0 to 1) of std_logic_vector(7 downto 0);
signal SAD_CMP : blk_size;
signal data_blk1 : blk_size := (others => (others => "00000000"));
process(clk,reset,current_data_in,sdata)
begin
if reset = '1' then
search_blk <= data_blk1;
current_blk <= data_blk1;
SAD_CMP <= data_blk1;
elsif (clk'event and clk ='1') then
for m in 1 to 4 loop
for n in 1 to 4 loop
if (cdata'event) then
for i in ((m-1)*blksize) to ((blksize*m)-1) loop
for j in ((m-1)*blksize) to ((blksize*n)-1) loop
current_blk(i,j) <= cdata(i,j);
for k in 0 to (2*p+1) loop
for l in 0 to (2*p+1) loop
if (sdata'event) then
for x in 0 to (i+pvec(k)) loop
for y in 0 to (j+pvec(l)) loop
search_blk(x,y) <= sdata(x,y);
for u in 0 to 1 loop
for v in 0 to 1 loop
SAD_CMP(u,v) <= search_blk(u,v) - current_blk(u,v);
end loop;
end loop;
end loop;
end loop;
end if;
end loop;
end loop;
end loop;
end loop;
end if;
end loop;
end loop;
end if;
end process;
Thanks for any help.
Modukuri