If u r writing a verilog code for synthesis, u must always have this thinking:
1) Think RTL
++ The functionality between registers
2) Think hardware
++ Think of topology implied by code
++ Do NOT write HDL models (behavioral)
3) Think synchronous
We normally use behavioral coding to describe the behavior of a black box circuit. The black box circuit can be any circuit (analog, digital or mixed signal)
While structure coding is use to describe the component in a design with interconnects between them. Example, a netlist circuit.
U can get better understanding by reading some verilog coding books. U can find it in E-book section.