DonJ said:In many cases, you can use your calculations and simulation results together with measured performance of the cascaded LNA-Mixer in order to predict/extract the achieved performance of your design.
All the best
dsjomo said:If you are not going to measure it on-wafer, don't put matching network on chip. For a high Q node like output of LNA, it is very hard to get a good power match by using on-chip LC.
dsjomo said:I agree Mazz's method, shunt a buffer between LNA output and dedicated test pads. Normally off under LNA+Mixer operation. But a substitution is using two spare metal wires connected to pads and LNA(differential) output. Under normal operation, just keep the pad open. Under LNA test mode, turn Mixer off and match LNA output on board. Under Mixer test mode, turn LNA off and match Mixer input on board.
Layout these wires with top metal layer, if you don't want it anymore, cut it with laser beam.
I got it.dsjomo said:Here is a draft illustration.
h**p://home.pchome.com.tw/mysite/dsjomo/Testkey.bmp
1) The buffer can be a simple differential pair with large bias current driving low value resistors. But you have to know the performance of the buffer in order to derive the actual performance of LNA.
Only ESD problem? For my prototype design, I think I can handle this. What's the other problem you encounter?dsjomo said:3) The method I use can measure both LNA and Mixer but it suffers a serious problem --- ESD. It may cause ESD failure to the input of Mixer if you do not put any ESD device to that test pads.
1) The buffer can be a simple differential pair with large bias current driving low value resistors. But you have to know the performance of the buffer in order to derive the actual performance of LNA.
ccw27 said:Question about buffer design. I am using a resistive feedback buffer. So what simulations should I run to characterize the performance of the buffer and make sure it does not affect the performance of LNA?
Thanks
ccw27 said:Thanks.
So we should first match the LNA output using ideal passive device and check its S-parameters and so on. Once this is done we should attach the buffer, match the output and check the performance. Do I need to match the output of the buffer? My question is buffer is bound to increase NF, affect gain. Though you can roughly estimate the perfomance of buffer in simulation,its bound to be different in real silicon. So once the chip comes back and we measure the LNA+buffer we might be either over or under estimating its performance. Is that true?
Thanks
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