help, how to simulate following spec of differential op

[fxxjssc]

hi all,

my tool is Hspice, can you tell me how to simulate slew rate, settling time,
open loop gain of differential Op. or is there any book i can refer.
Thanks

 

[sankudey]

Hi,
I do work in cadence. But hope the methods will be similar.

1. Setteling Time==> Connect the OPAMP in -ve feedback configuration. Give a step (a square wave will do also) to the input (+ve). The Magnitude of the step should cover the full scale (ICMR- to ICMR+). Now watch the transient response

2. give very small signal at i/p (say 0.1mv to 2mv magnitude) and look for the transient response in open loop configuration.

3. Slew rate==> a bit confusing. For lookig the maximum slew rate you can measure the slope of the first response (to measure the slope; press two cursors at the middle of the output).

Ref:
for Diff-amp: (analog design books)
1. Razavi ==> availabe in this board
2. Allen Holl berg etc...



hope would help..
sankudey

 

[fxxjssc]

Thanks, what about convert differential op to single ended conterpart and measure these spec. what's your opinion

 

[sankudey]

Hi,
Here I think the classic thinks applies well. For MOS, do it by Current Mirror (definitely mismatch comes into picture). For BJT/HBT-> a bit confusing, better is an one ended output....can get some idea from "Grey...Meyer..." book (four author. This is available in this EDABoard...


hope would help you....
sankudey

 

[lokeyh]

This article will be helpful to you.

https://www.designers-guide.org/Analysis/diff.pdf

 

[skymusic]

Refer to the book CMOS ANALOG CIRCUIT DESIGN written by Allen

 

[jgarciarivera]

I'm sending you my thesis. A whole chapter is presented on simulations.
Otherwise, visit this link:
**broken link removed**

 

[jgarciarivera]

I'm sending you my thesis. A whole chapter is presented on simulations.
Otherwise, visit this link:
**broken link removed**

 

[shao]

thanks for the paper