[help]how to select peak-to-peak value in flash adc

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skyeaglemm

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when designing a gps receiver, a simple rule to decide the overall gain is to amplify the signal to the maximum range of the ADC. but i am wandering what determine the maximum range of the ADC. A paper mentioned the peak-to-peak value of a 1-bit adc is 100mv,what is the reason? if i design a 4-bit flash adc in 0.25um TSMC techology, what is the proper peak-to-peak value? what factors we should take into account?thanks a lot!
 

It looks like you don't fully understand the operation and principle of an ADC. In the communication system, all that matters are really noise and distortion. The input range of the ADC is set by its reference voltage, which in turn is determined by the signal level appearing at the input of ADC. The number of bits of ADC is usually dedermined by the thermal noise floor and the quantization noise caused by this ADC.

A good way to characterize the ADC is its dynamic range. The DR is closely related with amount of pre-filtering happened before the ADC. To really figure out the ADC's spec, you need some good understanding of the communication channel and system level knowledge.
 

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