adedia
Member level 2
Well i had a problem
Trying to build an circuitry for crc-4
The data input is 8 bit serial
we will add 4 bit 0's tho the tail of the 8 bit data
so the output will be 12 bit data
one thing that came up my mind
is using the serial as an input to A 8 bit SIPO register (ls164) at first stage that connected to a PISO register (ls165) 2nd stage
the output o f the PISO connected to and OR gate input which the 2nd input of the OR always set to 0....
Well the load data is the set to cycling each 12 clock in order to get 12 bit data consist of 8 bit data and 4 bit 0
But all i've got was corrupted data
any other suggestion ?
Trying to build an circuitry for crc-4
The data input is 8 bit serial
we will add 4 bit 0's tho the tail of the 8 bit data
so the output will be 12 bit data
one thing that came up my mind
is using the serial as an input to A 8 bit SIPO register (ls164) at first stage that connected to a PISO register (ls165) 2nd stage
the output o f the PISO connected to and OR gate input which the 2nd input of the OR always set to 0....
Well the load data is the set to cycling each 12 clock in order to get 12 bit data consist of 8 bit data and 4 bit 0
But all i've got was corrupted data
any other suggestion ?
