hhq414
Member level 1
Hi,all
I have a circuit which can be simulated by hsim, but when I use HSIM and VCS to do co-simulation.,there is a problen about the used lib:
ERROR:0x31501054:File "/spice/models/YI-115-SM003/hspice/sm115003.hspice", line 7752, column 100, format SPICE: Unsupported Charge-Conserved Capacitor
The above error is encountered when compiling(vcs -ad_hsim +ad=vcsAD.init verilog/**.v +vcs+dumpvars). Has anyone ever encountered this problem? How to solve it?
I have a circuit which can be simulated by hsim, but when I use HSIM and VCS to do co-simulation.,there is a problen about the used lib:
ERROR:0x31501054:File "/spice/models/YI-115-SM003/hspice/sm115003.hspice", line 7752, column 100, format SPICE: Unsupported Charge-Conserved Capacitor
The above error is encountered when compiling(vcs -ad_hsim +ad=vcsAD.init verilog/**.v +vcs+dumpvars). Has anyone ever encountered this problem? How to solve it?