HC-SR04 code or hardware problem

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module ultrasonic(clk,fpga_rst,trig,echo,lights);
 
input  clk;
input  fpga_rst;
input  echo;
output trig;
reg [16:0] t;
reg [16:0] s;
output reg [7:0]  lights;
 
 
reg [19:0] cnt;
 
pll1 pll1(
.inclk0(clk),
.c0(clk_div)
) ;
 
 
always@(posedge clk_div)
begin
if(!fpga_rst)
cnt<=17'b0;
else if(cnt>=17'b1_1000_1000_0000_0000)
cnt<=17'b0;
else
cnt<=cnt+17'b1;
end
 
reg trig;
 
always@(posedge clk_div)
begin
if(!fpga_rst)
trig<=1'b0;
else if((cnt>=20'b1_0100)&&(cnt<=20'b10_1000))
trig<=1'b1;
else
trig<=1'b0;
end
 
 
always@(posedge clk_div)
begin
if(!fpga_rst)
t<=17'b0;
else if((cnt>=20'b1_0100)&&(cnt<=20'b10_1000))
t<=17'b0;
else if(echo)
t<=t+17'b1;
end
 
 
 
always@(posedge clk_div)
begin
if(!fpga_rst)
s<=17'd0;
else if(cnt<20'b1010)
s<=t/58;
end
 
always@(*)
begin
if(s<3'b10_1111)
lights=8'b00001111;
else 
lights=8'b11110000;
end
 
endmodule