Handel-C vs SystemC! which one is more popular and why

[sawaak]

handel-c

Hi,
as far as i know, these two languages provide 'C to FPGA' solution. i need to know which one provide good results and is more popular than other.

thanks
sawaak

 

[eltonjohn]

handel c

Hi saawak
I had only the chance to take a look at HandelC . i will certainly look at SystemC in the near future .. Well Regarding HandelC .. this is not really C .Is a language with C like features but a different language altogether .
It has parallel description capabilities .. Is not the only one There are others too . I will not comment on that ,..What to me is importantant is the methodology of the company behind it .Celoxica .. they have a very advance synthesis enviroment .. I'm really impressed and i'm trying to master it. Is more than just the language features .Celoxica has a new type of methodology .. where the soft and hardware boundries are easy to redefine and change .To me is the perfect enviroment for chips like the virtexII pro .. I see also that this company has not gone unnoticed by the big corporations .Intel Capital is now behind and founding it .. So i expect this company to become a major player .
maybe somebody else could comment on the philosophy of SytemC .. I mean not just the language .. but the exixtent tools and companies behind it!

 

[Beetroots]

comparison of systemc and handel-c

I'm not aware of any System-C to netlist route for FPGA's. Which tool did you have in mind?

Handel-C certainly looks impressive.

 

[yeewang]

handel-c or vhdl

systemC is more popular in industry and supported by mainstream EDA vendors.
There're emerging languages these years, systemC, systemVerilog, Handle-C, Vera, E language and etc., I think there'll be kinda cleanup later, after which only 1 or 2 will survive.

 

[faisalali]

difference c and systemc

HandleC is like a CSP(communicatiing sequential processes) type language. It provides you a set of library functions to communicate with others. For example, if two processes have to exchange some data, they have some common 'point' to meet. If process A reaches at that point earlier than process B then process A will have to wait for process B until it reaches there, then data exchange will take place and vice versa. After that both will continue with their other tasks. HandleC can be used for writing software that has to communicate with the FPGA which is mounted on a board connected to some peripheral slot of a PC. A good example is Embedded Solutions Emulation Boards with Xilinx FPGAs. I have used Handle C for board RC1000-PP of Embedded Solutions.

SystemC is a set of library functions to describe a hardware design. You can call it a HDL language like VHDL or verilog. SystemC is becoming popular because it is much faster than VHDL/Verilog and there fore it can provide much faster simulation than other HDL language. Good point to start is systemc.org . As far as I know, only Synopsys and Cadence have the tools which can provide synthesis for hardware written in SystemC.

SystemC and HandleC are very different and they are used for different purposes.

 

[massive]

systemc handelc

Handel C and System C are somwhat different and shouldn't be compared. the are used for different purposes!

learn more about handel C on
**broken link removed**

 

[eltonjohn]

handel c system c

I wanted to comment on faisalali's explanation .. Yes handelC has a CSP like structure. but This needs clarification ... Another well known language that has this type of sychronizing primitives (rendez vous) is ADA .. But the difference is that in ADA , The process or tasks are sequential because of the nature of the CPU .. But HandelC uses this mechanism to stablish the comunication boundries between the soft and the hardware .
The Harware processes can be ultimatly highly parallel .. And handelC also provides the promitives to do this ..
If your application doesn't require a "software side".Well you don't use communication routines .. In another behevioral language .MATCH compiler. like in the one by accelfpga .This "PORTS" or synchronizing ports have to be included by hand ..
So i think that HANDELC .. is a good COCKTAIL .of language primitives that allows to think of harware design in a new light!

 

[ramesh]

handel-c example

Handel-C is almost like ANSI C with "par" construct which is required for parallel hardware realization. Register length can be defined as per requirement for optimizing logic ultilization. The one who knows 'C' can easily pick up Handel-C because of more similarities.

 

[Beetroots]

is systemc popular

Is anyone using the new Celoxica SystemC synthesis tool?

Any tool reviews would be welcome.

 

[delay]

celoxica versus

Any language is powerful if you master it.

 

[Aser]

handel c versus systemc

Any synthesable Verilog and VHDL can be injectively mapped into System C.
It was be done to easy port hardware projects to C programs.
Therefore SystemC programming technique has the same properties
that Verilog has.
HandelC is serial language except link mechanisms.
You can write the C program with proper data types and without
links and this program can to be mapped into such a specific hardwired microcontroller which implements all of operators serially, one operator for a single clock cycle.
Links serve for communications between such a microcontrollers.

 

[omara007]

handel c

Handel-C is powerful from synthesis point of view as Celoxica is handling its synth. tool in a magnificent way .. while systemC is gaining more support at the simulation level from almost all EDA companies ..

I still guess that HDL with C/C++ do produce a very good solution to near future's tech.