Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
You would start to reproduce the given logic circuit in Verilog and verify its correct operation. Then add the additional logic (result counters) described in the problem text.
A structural approach seems most easy, write models for 74194 and the other logic devices, or copy it from a library. Verify the correct operation of the models if you have designed it yourself, then put it together in a design top module. Write a test bench for the game.
I appreciate this exercise problem because it treats Verilog as hardware description language rather than software.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.