So, one times I generate in receptor the 3 bits (which if the 3 bits are 0 there is not error) to correct the seven bits I must put a and gates with that 3 bits (because 1-1-1 are seven) and the output of the and gates make the parity (with xor gates) whit the seven bits. right?
The receiver generates a syndrome word, from which by using a bitwise XOR operation, the error can be corrected. You must consider the fact that only correctable errors will generate a correct output word at receiver side.