Javad1991
Newbie level 4
Hello guys,
I have designed a GHz-range RF ADC chip with 48 pins and am planning to use a QFN package for it. I understand that the QFN package includes an exposed pad under the center of the chip for heat dissipation, which could also be used to help reduce bonding wire inductance for GND pins.
In my design, I have separate GND/VDD pins for Analog, Digital, Analog Padring, Digital Padring, and DACs. Should I connect all these GNDs to the exposed pad using a down bond, or would it be better to connect the noisier digital GNDs with normal wire bonding and reserve the exposed pad for more critical grounds?
To clarify further: if all the GND pins should connect to the same potential, should I connect them on the PCB side or inside the package via the exposed pad? In the latter case, I think I could reduce the number of pads and use a smaller package, such as a QFN40 instead of a QFN48. Does that make sense?
I have designed a GHz-range RF ADC chip with 48 pins and am planning to use a QFN package for it. I understand that the QFN package includes an exposed pad under the center of the chip for heat dissipation, which could also be used to help reduce bonding wire inductance for GND pins.
In my design, I have separate GND/VDD pins for Analog, Digital, Analog Padring, Digital Padring, and DACs. Should I connect all these GNDs to the exposed pad using a down bond, or would it be better to connect the noisier digital GNDs with normal wire bonding and reserve the exposed pad for more critical grounds?
To clarify further: if all the GND pins should connect to the same potential, should I connect them on the PCB side or inside the package via the exposed pad? In the latter case, I think I could reduce the number of pads and use a smaller package, such as a QFN40 instead of a QFN48. Does that make sense?