gmID Methodology design example

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AMSA84

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Hi guys,

Can someone tell me where can I find some references and examples to design a OTA amplifier using the gm/ID methodology? Specially some examples.

Kind regards.
 

Thanks erikl.

Do you have any experience using this methodology? Did you got good results designing for example amplifiers with it?

Can you give me some tips on how to start or where should I start?

Regards.
 

AMSA84 said:
Do you have any experience using this methodology? Did you got good results designing for example amplifiers with it?
Click to expand...
Yes, I did.

AMSA84 said:
Can you give me some tips on how to start or where should I start?
Click to expand...
Just study the articles I gave you. You can get more papers on gm/Id usage and W/L calculation if you have access to IEEE papers.

There's a book which helped me a lot to understand and use this method:
David M. Binkley: Tradeoffs and Optimization in Analog CMOS Design.
 

Thanks for the reply. I'll take a look at that.

By the way erikl, do you know how to do the slew rate test as well as the icmr and offset on a OTA? Can you give me a tip on how to do that?

Regards.
 

Too many questions, AMSA,

I'd suggest you read some analog circuit design textbooks, or search for your questions in this forum - all of them already have been treated here several times.
 

erikl, thanks for the reply.

Regarding the gm/ID, I have read almost everything that you have posted on that .rar file. However, I am a bit confused. How can I get those curves that we can see all over the references that you have posted as well as on other references that I have read too?

I see the procedure, I see some calculations, I see some tips, etc, but what I don't see and I think it's the most important is how to get those curves? Geez.

Thanks in advance.
 

AMSA84 said:
... what I don't see and I think it's the most important is how to get those curves?
Click to expand...

Which ones do you think of? gm vs. Id is explained several times. The other curves go by sweeping the abscissa parameter; the ordinate parameter can be evaluated with help of the calculator (in the Cādence simulation environment), or by other calculation tools like Matlab or Excel.
 

AMSA84 you can find all the test benches in the attachment.
 

Attachments

  • VR-Parameters CMOS_OpAmp-1300771784.pdf
    1.2 MB · Views: 279
Hi zulqar. Thanks for the input, however this attached file that you have posted is useless for what I am looking for.

erikl, for example, gm/gds. Where I get the gds? Another example, Cgg?

Moreover, I wonder myself how this can work very well, since all those parameters change with the bias point as well as with the transistor sizes. So I ask, which transistor size I must choose to get all the curves? What bias conditions? Do you understand what I mean?
 

AMSA84 said:
... for example, gm/gds. Where I get the gds? Another example, Cgg?
Click to expand...
From a DC analysis, in the transistor parameters. Study the simulation basics!

AMSA84 said:
... since all those parameters change with the bias point as well as with the transistor sizes. So I ask, which transistor size I must choose to get all the curves? What bias conditions? Do you understand what I mean?
Click to expand...

I hope so. You run a DC analysis and sweep 1 or 2 parameters, for a special transistor with fixed W and L. For gm/Id you sweep Vgs (or Veff). Otherwise keep the bias constant. Same for frequency sweeps (ac analysis).

And study the textbooks! It's all in there.
 

AMSA84 said:
how to do the slew rate test as well as the icmr and offset on a OTA? Can you give me a tip on how to do that?

Regards.
Click to expand...
I posted that attached file for this query only and if its useless , then I wonder why.
 

Thank you erikl for your information. It is very helpful for a fresh like me.
 

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