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Glitches at transitions in DAC

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wany

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When digital changes from 011111 to 10000 the output(analog signal) have dithering . The reason is noise ? Or glitch?
 

Re: Question about DAC

Hi,
If the output is always same it is glitch. Depends on the kind of the DAC implemented.
brmadhukar
 

Re: Question about DAC

i think it depends on the architecture of your DAC, mostly due to your decoder.
because when digital code changes from 0111 1111 ->1000 0000,
it maybe changes as below:
01111111 -> 00000000 ->10000000
so there emerges a ripple at the Analog output.
 

Re: Question about DAC

This is waveform of output. I have marked in it
 

Re: Question about DAC

If u r using a current steering DAC, the maximum number of switch transition(off to on/on to off) occurs in this point, which results in the high glitch.
 

Re: Question about DAC

But when the input is 001111 to 010000 , the output also rippled.
 

Question about DAC

depend on you DAC switch and current mirror
 

Re: Question about DAC

Take care of sizing of the current switch. Also you can use swing reduced clock and isolation transistor to reduce the glitch.
 

    wany

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Re: Question about DAC

I believe this depend on the current circle between the DAC and the receiver. If the current circle is broken by a slot, a error data may be produced.
 

Re: Question about DAC

Dear Wany,

You will always find a glitch at every transition. But how major is it depends on where the code is changing. For example, in a 4 bit DAC, you will see a max glitch where there is a transition of code from 0111 to 1000. But you will also notice glitches during the 0011 to 0100 transition and so on. The reason for these glitches are :

1. CFT (Charge feed through/Charge injection) through the switches.
2. Clock timing - which determines the phases where the switches are ON or OFF.

To rectify it, just resize the sizes of your switches. There are indeed very huge glitches in your circuit. Or else, depending on your architecture, decide whether you need a overlapping clock or a non-overlapping clock. In case of Current steering DAC, the clock should be overlapping so that there is current through atleast one of the differential branches.

I hope it helps..........
 

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