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Getting the warning XST:1710 and 1895 while running my top module.

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BojackHorseman

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My aim is to find the pulse width of an unknown incoming signal. To that I have written the following synthesizable verilog code but I am getting the warning XST 1710 and XST 1895. When I try to simulate the code, I get 'XXXXXX' in red.
Top module:


Code:
`timescale 1ns / 1ps

    module top( input clk_100mhz,
                    input inp,
                    input reset,
                    output [13:0] average
        );
   
    wire [13:0] w_width;
    wire [13:0] w_sum;
   
    pulse_counter pc(.clk_100mhz(clk_100mhz),
                          .inp(inp),
                          .reset(reset),
                          .width(w_width));
                         
    adder a(.width(w_width),
              .sum(w_sum));
             
    averager avg(.clk_100mhz(clk_100mhz),
                     .reset(reset),
                     .sum(w_sum),
                     .average(average));
   
    endmodule

Pulse Counter Module
Code:
module pulse_counter(     input clk_100mhz,
                        input inp,
                        input reset,
                        output reg [13:0] width
    );
reg [13:0] counter;


always @(posedge clk_100mhz or posedge reset)

if (reset) begin
counter <= 14'd0;
end

else begin
    if(inp == 1) begin
    counter <= counter + 14'd1;
    end
   if(inp == 0) begin
        width <= counter;
        counter <= 14'd0;
    end



end
endmodule


Adder Module:
Code:
`timescale 1ns / 1ps

module adder( input [13:0] width,
                output reg [13:0] sum = 14'd0
    );

always @(width) begin
sum = sum + width;
end


endmodule
Code:
WARNING:Xst:1710 - FF/Latch <avg/average_8> (without init value) has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <avg/average_9> (without init value) has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <avg/average_10> (without init value) has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <avg/average_11> (without init value) has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <avg/average_12> (without init value) has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <avg/average_13> (without init value) has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process.

Averager Module:
Code:
`timescale 1ns / 1ps

module averager( input clk_100mhz,
                      input [13:0] sum,
                      input reset,
                      output reg [13:0] average
    );
reg [27:0] counter;

always@(posedge clk_100mhz or posedge reset) begin
if (reset) begin
counter <= 28'd0;
end

else begin
counter <= counter + 28'd1;
    if (counter == 100000000) begin
    average = (sum + 14'd50) / 14'd100;
    counter <= 28'd0;
    end
end

end
endmodule


Warning:
Code:
WARNING:Xst:1710 - FF/Latch <avg/average_8> (without init value) has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <avg/average_9> (without init value) has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <avg/average_10> (without init value) has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <avg/average_11> (without init value) has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <avg/average_12> (without init value) has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <avg/average_13> (without init value) has a constant value of 0 in block <top>. This FF/Latch will be trimmed during the optimization process.

Simulation Output:
1666889169454.png


Testbench:
Code:
`timescale 1ns / 1ps

module toptb;

    // Inputs
    reg clk_100mhz;
    reg inp;
    reg reset;

    // Outputs
    wire [13:0] average;

    // Instantiate the Unit Under Test (UUT)
    top uut (
        .clk_100mhz(clk_100mhz),
        .inp(inp),
        .reset(reset),
        .average(average)
    );

    initial begin
        // Initialize Inputs
        clk_100mhz = 0;
        inp = 0;
        reset = 0;
#10 reset = 1;
#10 reset = 0;
        // Wait 100 ns for global reset to finish
        #100;
       
        // Add stimulus here

    end
  always #5 clk_100mhz = ~clk_100mhz;
always #10000 inp = ~inp;
endmodule
 

There's no averaging action in average module, just divide by 100. This forces the upper 6 result bits to zero, as told by the warning.
--- Updated ---

You see no valid average value before the countdown ends.
--- Updated ---

adder module misses sum reset.
--- Updated ---

If pulse input is asynchronous to clock, it should pass a synchronizer before sent to pulse_counter. Otherwise inconsistent count results may occur.
 
Last edited:

adder module isn't an adder, it doesn't have any storage FF in it. Also using output reg [13:0] sum = 14'd0 will usually result in sum being a constant 0 value.
 

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