[SOLVED] getting footrint error in orcad 9.2

hi;
i made a simple power supply circuit in orcad9.2 capture cis and after that i assign footprints to the components from existing liabraries and then made its netlist and open it in layout but in layout it give me the following compilation errors for most of the components:

electrical package cap_pol for comp c5 has at least one pin (2).
which has no corresponding pin on footprint CPLCY/D.275/LS125/.034

I am getting this kind of errors for most of the components used in schemetic. i am new to orcad and want the help of experts.

is it necessary to create my own footprints in layout and assign it to the components used?
i am now assigning the existing footprints to the components.
moreover i think it is drawback of orcad that it has no predefined assignment for the components as proteus have.

kindly guide me about that.
thanking you in anticipation

Only thing I can think of is if your schematic symbol has different number of pins from the footprint you assigned to. Make sure you open the pcb library and look at the footprint to make sure you have the right number of pins as the schematic part you created.

Alan0354 said:

Only thing I can think of is if your schematic symbol has different number of pins from the footprint you assigned to. Make sure you open the pcb library and look at the footprint to make sure you have the right number of pins as the schematic part you created.

Click to expand...

i checked it many times .. the number of pins of footprint and that of schemetic are the same.. the problem is some what more technical that i can't understand.... :-(

The footprint is very simple, it's only pads. Check the schematic symbol, what kind of pin you use to create the part. When you add a pin, you have a choice of type. I always choose passive, I don't specify output, open collector etc.

I don't know what else can cause that, try this first.

Alan0354 said:

The footprint is very simple, it's only pads. Check the schematic symbol, what kind of pin you use to create the part. When you add a pin, you have a choice of type. I always choose passive, I don't specify output, open collector etc.

I don't know what else can cause that, try this first.

Click to expand...

no i am not creating any schemetic symbol or footprint.. i am using build in liabraries. i used diode DIODE 34/DD in capture cis and used DAX/1N_4001-4007 as footprint in layout. but it is showing error for all the diodes i used in my schemetic. prior to this i have used simple diode in schemetic and used the same foot print in layout but the problem is the same ...... should i create my own schemetics and footprints???

Check and make sure DIODE 34/DD have both pins numbered pin 1 and pin 2. Maybe if the pin number don't match with the footprint of DAX/1N_4001-4007, it might not like it.

To check the pin, go to file, open, library. Click the DIODE 34/DD to open the symbol. Then double left click the pin. It will give you the property. It will tell you what kind of pin, make sure you put it in "passive", and pin number 1 and 2 for a two pins symbol like this one. Then save the part.

Also, pull the part into the schematic, double click the part to look at the properties. Make sure DAX/1N_4001-4007 is in the box labeled "footprint".

It should work, I never have problem like this.

Thanks a lot Mr Alan. the problem was only in pin compatibility. the problem is solved now.. thanks again.

You are welcome, tell me what exactly you did.

Acctually in layout the diode footprint pads were marked as A and C while in capture the number of pins for anode and cathode were given 1 and 2 respectively. so i just change the footprint pads marks as 1 and 2 and it removed the error.

now i am facing another problem (acctually i am new to orcad so facing problems on every next step) the footprints have a lot of text written with it.. now i want to remove it..... secondly i want to increase the board size/area to accomodate the components correctly in reasonable spaces. i am designing a single layer pcb. please see the image below.

All the green text you are seeing is on the assembly layer. To turn off the display of that layer (or any layer for that matter) is to select the layer in the pull-down (from your attached picture, the top layer is selected) and search for "AST" for assembly top. Select it and press the "-" key. To turn it back on, re-select it from the pull-down. The white text is the silkscreen and is labeled SST. You can do the same with that. The pull-down menu color will be the same color as the layer so it makes it a bit easier to find the desired layer to switch on and off.

To make the board size bigger, select the Obstacle tool. Then select the yellow border and you can drag the sides to the desired dimensions.

spudboy488 said:

All the green text you are seeing is on the assembly layer. To turn off the display of that layer (or any layer for that matter) is to select the layer in the pull-down (from your attached picture, the top layer is selected) and search for "AST" for assembly top. Select it and press the "-" key. To turn it back on, re-select it from the pull-down. The white text is the silkscreen and is labeled SST. You can do the same with that. The pull-down menu color will be the same color as the layer so it makes it a bit easier to find the desired layer to switch on and off.

To make the board size bigger, select the Obstacle tool. Then select the yellow border and you can drag the sides to the desired dimensions.

Click to expand...

thank you spudboy. i resized the size of the board but can't find the AST layer in your indicated manu where top layer was selected. it is only showing 0,1,2,21,25,26 layers. rest of the layers are inactive.

- - - Updated - - -

kindly also tell me what is the difference between Cadance layout and Cadance Allegro? are they different softwares or it is the name of the same softwares?

Click the "Color Setting" on top of the screen.......The square with red, blue, yellow and green. Look for Assembly layer and click to make it invisible. Or else, you need to go to "Text" mode by click on "T" on the top. Then click the text you want to delete, then just hit delete and it's gone!!!

I don't know the new OrCad, the new version 16 is totally differently.

It's not in the pull-down menu where "1 TOP" is listed on your attached screenshot above? On my system, AST is layer 23. The top silkscreen (SST) is 21.

I would not recommend just deleting the text unless you know you will not use it. Once it's gone, it's gone. Turn the layer off to clear up the display.

Allegro is the new version of OrCAD's PCB design software. Personally, I like Layout MUCH better.

spudboy488 said:

It's not in the pull-down menu where "1 TOP" is listed on your attached screenshot above? On my system, AST is layer 23. The top silkscreen (SST) is 21.

I would not recommend just deleting the text unless you know you will not use it. Once it's gone, it's gone. Turn the layer off to clear up the display.

Allegro is the new version of OrCAD's PCB design software. Personally, I like Layout MUCH better.

Click to expand...

Is the new OrCad 16 big difference from the 9.2? You mean the new OrCad is Allegro? Is it better than the old OrCad?

I know Power PCB ( PADS) a few years ago, I learn the Eagle latest version. OrCad 9.2 is the better than both by quite a bit for RF design to me. There is a lot of flexibility in customize the padstack, copper pouring and hand routing that the eagle cannot hold candle to. I designed a 26 layers pcb that Eagle won't work.........not just the number of layers, its the different pad size for different layers that I absolutely need to get the clearance for high voltage standoff. Also you can set custom color and routing width to the nets in OrCad. I found it so hard to deal with Eagle that all nets looks the same and you have to click to find out what net it is. Then you have to set the width every time. It's ok if you have simple high speed digital boards that all traces are same width, but if you have a RF board that traces are of different width, you constantly have to keep track of it. OrCad is just particularly good for more difficult analog RF boards. For other high speed dense digital, it's by default much easier to layout, then it's no big deal what package you use.

I guess for simple high speed pcb like DDRAM stuff, other pcb package might be ok, but come to real RF, high voltage type of pcb that require a lot of customize nip & tuck designs, I still think OrCad is the one. Also, the commands are so much faster in 9.2. Commands are mostly one key, not the Cntl/key, Alt/Key or Shift/Key that you need two fingers. Of the three I know, Eagle is the worst, they use modular type approach like software programming. OrCad 9.2 must be at least 30% faster to layout a pcb when you only count the layout time ( exclude thinking time). The only good thing of Eagle is it's dirt cheap.

I am going to buy a pcb layout package, I so wish they still sell 9.2 for a deep discount price. Just too bad it looks like I am stuck with Eagle:-(.

I have successfully design my pcb on orcad9.2.. please see it in figure.


now i have a few problems:
1)I want to print the bottom and SSTOP layers sepretely on white A4 size pages. but the printer is printing exectly the same image as shown in figure above.

2) Secondly my software is showing only 6 layers, 0,1,2,21,25 & 26 as shown in the figure below :

how to make other layers visible. after making other layers visible i want to deactivate ASYTOP layer. secondly for what purpose ASYTOP layer is used for? can i get any link about usage of all layers in a multilayer pcb?

3) thirdly if you see the bottom edge of the board in the pic; you will see it overlapping with Drill Chart. how i move my whole board up to avoid the overlap?

4) if i want to make a garber file. how many layers will it take to print on pcb? all active layers or only bottom copper, sstop, and drilling layers info? and after making garber file how do i come to know about the correctness of the file and number of layers it decode to process??

I don't know and never print the board on printer, sorry, can't help you on that one.

2) Your top layer is off!!!

3) You can move the drill chart, go Tools, Drill Chart, then click move drill chart. Then you point the arrow to the place you want to move and click, the drill chart will move.

One note, your origin is off. To move origin to the lower left corner of the board. Go Tool, Dimension, then click MOVE DATUM, then zoom into the lower left corner of the board outline and click.

4) You need all the board layers, then you need SST, SSB( if applicable), DRD, DRL, SMT, SMB. This is the minimum.

I don't put FAB drawing as that contain value of the components, this will make it easy for others to reverse engineering my design.

Shortly... i want to remove the green blocks and yellow line of jumper form my pcb to get the bottom copper layer only.. how to proceed for that?


compare it with the fig below.


does garbar file contain the information of the board and component exact sizes???

Alan0354 said:

4) You need all the board layers, then you need SST, SSB( if applicable), DRD, DRL, SMT, SMB. This is the minimum.

I don't put FAB drawing as that contain value of the components, this will make it easy for others to reverse engineering my design.

Click to expand...

my pcb is single sided designed for through hole components. so what is the use of SMT layer????

what is FAB drawing?

By including the SMT (solder mask, top) layer, It will put a coating on the top side of the board to give it a "finished" look. Also, depending on how the board house screens it, it may also cover the silkscreen as well.

A (FAB)rication drawing is another name for the Assembly layers (AST and ASB) that contain the values of resistors, capacitors, etc. that were part of the netlist file that you used to start the layout.

spudboy488 said:

By including the SMT (solder mask, top) layer, It will put a coating on the top side of the board to give it a "finished" look. Also, depending on how the board house screens it, it may also cover the silkscreen as well.

A (FAB)rication drawing is another name for the Assembly layers (AST and ASB) that contain the values of resistors, capacitors, etc. that were part of the netlist file that you used to start the layout.

Click to expand...

thank you spudboy. can you please give a brief discription about all layers used in PCB? any artical? pdf note?