pavan garate
Member level 3
I know how to simulate a circuit using TSPICE and want to generate its layout. Is it possible to generate the layout from the schematic? If it is not possible, then can we generate a Verilog file from the schematic in TSPICE and then use that Verilog file to generate the layout in MICROWIND?
I’m using TSPICE version 14.11 and MICROWIND version 3.1.
I’m using TSPICE version 14.11 and MICROWIND version 3.1.