johnbizzee
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I am trying to pass a new parameter to the uart module using my top module.
I have a MUX that outputs 7 or 8 depending on the switch value of high or low. (sw[0]) connected to my FPGA board. This value of 7 or 8 is outputted from the mux's q_out and connected to a wire called "db" for databits. I am trying to throw this value db into a conditional statement to instantiate the parameter as 7 or 8, but I am getting an error that I put below in the comment. What am I doing wrong? Is there a better way of doing what I am trying to achieve?
Thank you so much for your time.
I have a MUX that outputs 7 or 8 depending on the switch value of high or low. (sw[0]) connected to my FPGA board. This value of 7 or 8 is outputted from the mux's q_out and connected to a wire called "db" for databits. I am trying to throw this value db into a conditional statement to instantiate the parameter as 7 or 8, but I am getting an error that I put below in the comment. What am I doing wrong? Is there a better way of doing what I am trying to achieve?
Thank you so much for your time.
Code:
module uart_topmodule
(
input wire [1:0] sw,
input wire clk, reset,
input wire rx,
input wire [2:0] btn,
output wire tx,
output wire [3:0] an,
output wire [7:0] sseg, led
);
// signal declaration
wire tx_full, rx_empty, btn_tick;
wire [7:0] rec_data, rec_data1;
wire [1:0] select;
wire [3:0] db;
dbitmux7or8 dbmux (.q_out(db), .select(sw[0])); // mux to output 7 or 8 depending on select which is toggled by the switch sw[0]
// this state is conditionally passing the parameter to the uart of 7 data bits or 8 data bits
generate
if(db == 7) // I am getting an error pointing to this line: "line 25 Illegal condition expression in generate if statement" I am not sure what's wrong with using db this way?
begin
uart #(.DBIT(7)) uart7
(.clk(clk), .reset(reset), .rd_uart(btn_tick),
.wr_uart(btn_tick), .rx(rx), .w_data(rec_data1),
.tx_full(tx_full), .rx_empty(rx_empty),
.r_data(rec_data), .tx(tx));
end
else if ( db == 8)
begin
uart #(.DBIT(8)) uart8
(.clk(clk), .reset(reset), .rd_uart(btn_tick),
.wr_uart(btn_tick), .rx(rx), .w_data(rec_data1),
.tx_full(tx_full), .rx_empty(rx_empty),
.r_data(rec_data), .tx(tx));
end
endgenerate
// instantiate debounce circuit
debounce btn_db_unit
(.clk(clk), .reset(reset), .sw(btn[0]),
.db_level(), .db_tick(btn_tick));
// incremented data loops back
assign rec_data1 = rec_data + 1;
// LED display
assign led = rec_data;
assign an = 4'b1110;
assign sseg = {1'b1, ~tx_full, 2'b11, ~rx_empty, 3'b111};
endmodule
Last edited: