Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

General doubts about MOSFETs

Status
Not open for further replies.

Akshe

Junior Member level 2
Junior Member level 2
Joined
Dec 3, 2010
Messages
21
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,460
Hi,

I have a few doubts about the MOSFETs in general-
1. What is the drain voltage when the MOS is in different modes of operation (saturation,linear and subthreshold). There is a finite current being sourced or sunk by the device and 1 terminal of the device is at Vdd or gnd.

2. In the case of NMOS where we have Vdd at one terminal and Vgate is Vdd too, the voltage at the other terminal can be max Vdd-Vthn. Is this valid only for saturation region operation?
Similarly for the PMOS when there is 0 at Vgate and one of the terminal , the other terminal can have Vthp as the minimum voltage. Is this also valid only for the saturation region?

3. Is this correct-
weak inversion = Subthreshold mode (Vgs<Vth)
Onset of strong inversion = Vgs = Vth
Strong inversion = Linear and Saturation mode

Any good references to help get these answers will also be helpful.:roll:
 

Hello

1. the transistor is to be in the saturation region when VGS ≧ Vth and VDS ≧VGS-Vth. Look at the condition AND

the saturation region itself the transistor can be under the strong or the weak inversion (also called subthreshold) depending on the difference value of VGS from Vth. it is assumed ideally that if VGS is less than Vth the transistor will not conduct a current, however, in reality the transistor starts to conduct small amount of current before this Vth, the current is referred as the subthreshold current at the subthreshold voltage . I attached you this image, it will help you.




2. I think you are considering the transistor switch charging a capacitor,;-). yes , it is reffered for the saturation region.

3. exactly right, see also my image


Hi,

I have a few doubts about the MOSFETs in general-
1. What is the drain voltage when the MOS is in different modes of operation (saturation,linear and subthreshold). There is a finite current being sourced or sunk by the device and 1 terminal of the device is at Vdd or gnd.

2. In the case of NMOS where we have Vdd at one terminal and Vgate is Vdd too, the voltage at the other terminal can be max Vdd-Vthn. Is this valid only for saturation region operation?
Similarly for the PMOS when there is 0 at Vgate and one of the terminal , the other terminal can have Vthp as the minimum voltage. Is this also valid only for the saturation region?

3. Is this correct-
weak inversion = Subthreshold mode (Vgs<Vth)
Onset of strong inversion = Vgs = Vth
Strong inversion = Linear and Saturation mode

Any good references to help get these answers will also be helpful.:roll:
 

Hello

1. the transistor is to be in the saturation region when VGS ≧ Vth and VDS ≧VGS-Vth. Look at the condition AND

the saturation region itself the transistor can be under the strong or the weak inversion (also called subthreshold) depending on the difference value of VGS from Vth. it is assumed ideally that if VGS is less than Vth the transistor will not conduct a current, however, in reality the transistor starts to conduct small amount of current before this Vth, the current is referred as the subthreshold current at the subthreshold voltage . I attached you this image, it will help you.




2. I think you are considering the transistor switch charging a capacitor,;-). yes , it is reffered for the saturation region.

3. exactly right, see also my image

Thanks a lot for the explanation but i have a few more queries -
For the part 1. In the case where we have a weak inversion in the saturation mode wouldn't that imply that there is no subthreshold mode as such because for the case Vgs<Vth means Vgs-Vth < 0 and Vds is mostly > 0. So it will always be saturation?
Also for my original query here - say in a circuit i know the current that is in a particular branch with the mos and i want to find the voltage at the other terminal of mos then how should i proceed with it? As in what mode current equation should i use to get the Vds value?

For 2. The Vdd-Vthn(NMOS max voltage) or Vthp(PMOS min voltage) is not valid when the device is in linear region?
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top