vinodkumar
Full Member level 5
Gateway - reg
Dear all.
i am new to simulink and sys gen of xilinx..
i am trying to build BPSk modulator..
for that i am using pulse genrator of 500 bps..
sine generator of 8KHz...
i am able to generate these waves which i am viewing in scope...
I am giving this to a Mcode block of xilinx,i got error - the input must be output of another xilinx block..
for that reason i found it to use a gatewayin and gatewayout..
here i am unable to view these output waveforms after gatewayin block..
help me out ...
Dear all.
i am new to simulink and sys gen of xilinx..
i am trying to build BPSk modulator..
for that i am using pulse genrator of 500 bps..
sine generator of 8KHz...
i am able to generate these waves which i am viewing in scope...
I am giving this to a Mcode block of xilinx,i got error - the input must be output of another xilinx block..
for that reason i found it to use a gatewayin and gatewayout..
here i am unable to view these output waveforms after gatewayin block..
help me out ...