fwrite in verilog....

[lakshminarayanan]

verilog fwrite

while using the fwrite in verilog....... as mentioned below....
$fwrite(file,"a=%d @=%d",a,addr);
if the value of a is negative i am getting the data in the file as.........for eg....-1 as 65535 but i need to print it as -1 in the file do any one know other format of writting the data so i colud write negative values as -1 in my file.....

 

[aji_vlsi]

fwrite verilog

while using the fwrite in verilog....... as mentioned below....
$fwrite(file,"a=%d @=%d",a,addr);
if the value of a is negative i am getting the data in the file as.........for eg....-1 as 65535 but i need to print it as -1 in the file do any one know other format of writting the data so i colud write negative values as -1 in my file.....

Using %d should print -1, for example the following code works fine in VCS:

module fwrite();

  initial begin : b1
    integer file;
    file = $fopen ("a.txt", "w");
    $fwrite (file, "MIN_1 is %d PLUS_1 is %d ", -1, 1);
   $finish;
  end

endmodule

Output is:

  MIN_1 is          -1 PLUS_1 is           1

HTH
Ajeetha, CVC
www.noveldv.com[/code]

 

[nand_gates]

$fwrite verilog

Checkout this!

module test;
   integer file;
   reg signed [15:0] a, addr;
   
initial begin
   a = -1;
   addr = 100;
   file = $fopen("test");
   $fwrite(file,"a=%d @=%d",a,addr); 
end
endmodule // test

 

[sree205]

verilog $fwrite

i think if you have declared the variable 'a' as register data type, there is a possibility that it might not show the negative value since it might be unsigned by default. Plz check the fwrite statement with 'a' declared as an integer and see if the same problem occurs.

Also, please provide a feedback on this.

 

[lakshminarayanan]

fwrite in verilog

The problem is fixed by the suggestion given by nand_gates........i am using the modelsim simulator in win xp ................

 

[rfub]

When I try the code above and simulate using Isim, the output has only one character, instead of "MIN_1 is -1 PLUS_1 is 1", the output is just M. Anyone could tell me how to solve it? Is it because I did the wrong simulation?
Thanks

 

[ivlsi]

What's the difference between $fwrite and $fdisplay?

 

[aruipksni]

What's the difference between $fwrite and $fdisplay?

just copy paste it from "verilog golden reference guide"

"The only difference between $display and $write, is that $display writes out a
newline character at the end of the text, whereas $write does not."

 

[ivlsi]

Thanks! Short and clear