Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Fully Differential Folded Cascode OTA With SC-CMFB design

Status
Not open for further replies.

cdbular

Junior Member level 1
Junior Member level 1
Joined
Aug 9, 2004
Messages
15
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
101
sc cmfb

Hello,
I have designed a fully differential folded cascode OTA with SC-CMFB.
I haver tested the circuit using a SC-CMFB network using Verilog-A macromodel switches. And the OTA seems to work very well.

When I replace the switches with transistors the clock injection is so bad that the CMFB voltage never is mantained at a fixed value and the performance of the amplifiers is terrible: low gain, the CM voltage is not the same as the reference value. The common mode open loop gain seems to be as large as the differential gain (~70dB) as well as the Unit gain Bandwidth (>125MHz).

What can I do to improve this desing. What should I do to reduce the effect of the charge injection produced by the CMOS switches. What is the "secret technique".
 

folded cascode ota design

Could you post the schematic and the output waveform of your SC CMFB simulation?
 

folded cascode ota

I attached the images of the schematic and the simulations.

When using the MOS switches the CMFB voltage varies in a much wider range. As you can see in the simulation screenshots.
 

cmfb folded cascode

Why don't you use dummy switches to minimize the effect of charge injection?
 

folded cascode

Is it visible in the simulation if you add dummy transistors to get rid of the effect of chage injection ?
 

cmfb switch

Dear Sir,

May we know how you perform CMFB simulation with ideal switch.
Did you keep feedback / sampling capacitors same as in MOS switch case?
 

ota cmfb design

jcpu said:
Dear Sir,

May we know how you perform CMFB simulation with ideal switch.
Did you keep feedback / sampling capacitors same as in MOS switch case?

I made a Verilog A model switch and replaced MOS switches with this model. Basically the ideal switches wor like a voltage controlled resistance, with very low resistance when activated (200 omhs), and a very high resistance when off (10Gomhs).
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top