balayoga
Newbie level 1
can any one understand how i want to write program of full adder and give me solution
entity adder is
Port ( a : in STD_LOGIC_vector(2 downto 0);
b : in STD_LOGIC_vector(2 downto 0);
c : in STD_LOGIC_vector(2 downto 0);
so : out STD_LOGIC_vector(2 downto 0);
co : out STD_LOGIC_vector(2 downto 0));
end adder;
architecture Behavioral of adder is
begin
process(a,b,c)
begin
for k in "000" to "111" loop
so[k] <= [a[k] and b[k] and c[k]];
co[k] <= [(a[k] and b[k]) or (b[k] and c[k]) or (c[k] and a[k])];
--j<= i-1;
--k <= conv_binary(j);
end for;
end proces;
end Behavioral;
entity adder is
Port ( a : in STD_LOGIC_vector(2 downto 0);
b : in STD_LOGIC_vector(2 downto 0);
c : in STD_LOGIC_vector(2 downto 0);
so : out STD_LOGIC_vector(2 downto 0);
co : out STD_LOGIC_vector(2 downto 0));
end adder;
architecture Behavioral of adder is
begin
process(a,b,c)
begin
for k in "000" to "111" loop
so[k] <= [a[k] and b[k] and c[k]];
co[k] <= [(a[k] and b[k]) or (b[k] and c[k]) or (c[k] and a[k])];
--j<= i-1;
--k <= conv_binary(j);
end for;
end proces;
end Behavioral;