FSK demodulator with LM565, 2 questions about the circuit...

[hkBattousai]

fsk demodulator ic

**broken link removed**
**broken link removed**

Q1) 10K + 10K pot combination is the external timing resistor required by the IC itself which is connected at the 8th pin. Why do we connect the 0.001uF capacitor between 7th and 8th pins of the IC? What is the importance of this capacitor, why is it needed, what would happen if we don't connect it?

Q2) Why do we use a, as high as, 3rd order low-pass filter at the 7th pin output? Are there so much ripples there? Or do we have another reason? Will a first order LPF be adequate in a theorical circuit if the frequency difference between the two input frequencies is perfectly 'digital' (e.g., frequency difference is either 0Hz or 100kHz all the time)?

 

[FvM]

lm565

Fortunately, a complete IC internal circuit is given, so you are able to understand the LM565 operation in detail, e. g. for a historical IC seminar.

The 1 nF capacitor, as far as I understand, is a kind of loop filter, some element of this kind is most likely required for regular operation.

I don't understand your hypothetical digital frequency difference concept. A PLL FSK demodulator depends on tracking the input frequency, involving also transient phase differences. The unfiltered frequency output would show some ripple then, and a first order filter can hardly provide fast response and no modulation residuals at the same time.

 

[hkBattousai]

fsk modulator ic

The 1 nF capacitor, as far as I understand, is a kind of loop filter, some element of this kind is most likely required for regular operation.

Loop filter in PLL is usually a low pass filter. A series capacitor will behave like a high pass filter, isn't it? This looks like a conflict.

I don't understand your hypothetical digital frequency difference concept.

I mean, the frequency difference between two inputs can have only two different values for all the time. For example 10kHz and 20kHz, or 0Hz and 1MHz, or 0Hz and 100kHz; no values between these two can exist. FSK is a digital modulation, isn't it? There are only two different frequencies in the modulated signal. For example, a 900kHz sinusiodal represnts a logic 0, and a 910kHz sinusoidal represents a logic 1. No values between these two frequencies can exist in the system theoratically.
What I asked was, if there are no frequencies except for two frequencies, and they are clearly sperated (e.g., 900kHz and 910kHz exist in the inputs, no frequencies like 908kHz or 901kHz exist), then do we still need a 3rd order filter?

A PLL FSK demodulator depends on tracking the input frequency, involving also transient phase differences. The unfiltered frequency output would show some ripple then, and a first order filter can hardly provide fast response and no modulation resiuals at the same time.

I think the higher order filter is required for the transition regions between two frequency components. If the frequency difference between the two inputs are constant we expect the voltage level at the 7th pin to be DC (thus, we don't need a low-pass filter). But at the moments of transition, 7th pin output can have highly rippled voltage levels, therefore we need a higher order filter for this worst case. Am I right here?

 

[FvM]

lm565 circuit

But at the moments of transition, 7th pin output can have highly rippled voltage levels, therefore we need a higher order filter for this worst case. Am I right here?

A FSK demodulator is often at the moments of transition I think... That's the one point.

As another point, if the phase demodulator output has or hasn't a ripple in steady state, depends on it's operation principle.

The problem is, that you are discussing a hypothetical PLL rather than the real LM565. It's phase detector has a ripple in steady state, according to National AN-46. The AN also gives a brief description of the above circuit. **broken link removed**

Loop filter in PLL is usually a low pass filter. A series capacitor will behave like a high pass filter, isn't it?

How do you know that it's a series capacitor without analyzing the circuit in detail. To my opinion, it's a miller capacitor.