I'm looking for non commercial progs to do vhdl simulation and also later physical design. Has anybody experience with alliance (h**p://w*w-asim.lip6.fr/a**iance/) or another package?
Well, this free tools is pretty ok for beginners. but it lacks the advanced features which most commercial tools have: such as its P&R feature: It doesn't support timing-driven
I am interested .. if you have time we can define the development environment and start using Alliance, for example, in generating the GDSII of some available-for-free IPs like Oregano's 8051 VHDL IP.