mridulsg82
Newbie
Verilog-A is a behavioral modeling language for analog circuits from the Verilog Family. It is the subset of Verilog-AMS. In this series, you can every detail of Verilog A Language.
Series Link : https://www.youtube.com/playlist?list=PLtChGkQ0aIK_s_JnZw9kJx9h_QJ3-FNCu
You are Welcome !
Regards,
Mridul
Series Link : https://www.youtube.com/playlist?list=PLtChGkQ0aIK_s_JnZw9kJx9h_QJ3-FNCu
You are Welcome !
Regards,
Mridul