FPGA design to CPLD, is there any conversion method?

[booblik]

FPGA design to CPLD

Hi,
I have a design that is implemented on a Spartan 3 chip. I want to know if it is possible to transfer it to a CPLD, say the CoolRunner-II. Will it fit? Is there any conversion method for macrocells-> logic elements?

Here are the details of the design:

Number of slice flip-flops: ~200
Number of 4 input LUTs: ~600
Number of occupied slices: ~400
Total number of 4 input LUTs: ~670

 

[mfarooq1]

FPGA design to CPLD

Hi
I think you just have to change the device when synthesize your code.

 

[shanmugaveld]

FPGA design to CPLD

Hi,
Chose the part no wrt available the user IO pins and io pins used in your design

 

[Marcel Majoor]

Re: FPGA design to CPLD

Why no just change the Spartan chip selection (in ISE) to a CPLD of your choice and then 'recompile'...
Using right click on the 'xc3...' definition and select properties. Then change the 'Family' (to Coolrunner) and 'Device' (select 'automatic ..').
Compile using 'Fit' should tell you if it is possible ...