FPGA configured with PROM

[salma ali bakr]

well, when i use a PROM to configure an FPGA, the pdf i am reading says that the FPGA in the Master serial mode generates a clock from an internal oscillator to be used as configuration clock...how is that....isn't the clock oscillator just a part on the development kit and it isn't related to the FPGA itself...so it isn't an INTERNAL oscillator...???

Should i just use a different mode, JTAG for instance to program the PROM....and use the kit oscillator if prototyping and on board oscillator if for production???

thanks in advance,
Salma

 

[Blowfishie]

The FPGA has a built in oscillator.

If you're using one of the Xilinx XCFxxP or XCFxxS parts, there is an oscillator onboard that, too.

 

[salma ali bakr]

FPGAs don't have an internal oscillator
and that's why i am asking my question
cause what is said in the pdf explaining the configurations is contradicting

see this topic blowfishie, everyone says there is NO internal oscillator
but i need someone to explain how to work in Master Serial mode for configuration if this was the case

 

[lonestar]

I have the same doubt like salma, i guess FPGA has only built-in clk for configuration?
ref: h**p://
Anyone knowing this pls clarify for us?
thanks

 

[angelote]

If FPGA is configured as Master Serial Mode, it uses an internal oscilator to generate the configuration clock. Then, the configuration clock pin acts as an output.

I've used it connecting directly the clk from FPGA to PROM and it works. (Xilinx SPARTAN-IIE)

Read your FPGA's datasheet carefully. Ususally there isn't any internal oscilator ready to be used in your design, but there is an oscilator for configuration in Master mode (almost Xilinx has it).

 

[salma ali bakr]

so this means that not necessarily all FPGAs have internal oscillators
cause i am using virtex 2 and there is nothing mentioned about that in the datasheet

 

[tkbits]

I have the same doubt like salma, i guess FPGA has only built-in clk for configuration?
ref: h**p://
Anyone knowing this pls clarify for us?
thanks

The Xilinx Spartan series has an internal oscillator for configuration only. The oscillator cannot be used in a design.

 

[Blowfishie]

FPGAs don't have an internal oscillator
and that's why i am asking my question
cause what is said in the pdf explaining the configurations is contradicting

see this topic blowfishie, everyone says there is NO internal oscillator

A quote from Xilinx User Guide ug161 (Platform Flash PROM User Guide):

The difference between FPGA Master Serial mode and FPGA Slave Serial mode is the clock source. In FPGA Master Serial mode, the FPGA generates a configuration clock that drives the PROM. In FPGA Slave Serial mode, the FPGA’s configuration clock is driven from an external source, such as an oscillator.

The FPGA has an on-board oscillator for configuration use only.

 

[sachingorkhe]

Plz read ug161.pdf carefully. It says -

"In Slave Serial mode, the configuration interface can be clocked by an external oscillator, or optionally — for XCFxxP Platform Flash PROMs only — the CLKOUT signal can be used to drive the FPGA's configuration clock (CCLK)."

"An internal oscillator in the XCF08P, XCF16P, or XCF32P Platform Flash PROMs can be used to generate the configuration clock CLKOUT while the PROM supplies data to the FPGA configuration interface. The internal oscillator can be enabled during PROM programming and can be set to either 20 MHz or the default of 40 MHz."

Regards,

SACHIN