dineshbabumm
Advanced Member level 4
I am getting this error while compiling a file in FPGA adv pro 7.1.. Can any one of you please help me?
Error msg
"--------------------------------------------------------
Comparing HDL files with compiled files ...
Current working directory is C:/FPGAdvPersonal7SimLSPS/Hds/examples/dd_tutorial_ref/uart_vhdl/hdl
Executing data preparation plug-in for ModelSim 5.8 - 6.0
Performing compile...
Library TIMER_Vlog
Error: Could not find executables at C:\FPGAdvPersonal7SimLSPS\Hds/../Modeltech/win32.
Check that the ModelSim Compile Settings are set correctly.
Failed during ModelSim compile
Data preparation step completed, check transcript...
---------------------------------------------------------------------------------
"
Error msg
"--------------------------------------------------------
Comparing HDL files with compiled files ...
Current working directory is C:/FPGAdvPersonal7SimLSPS/Hds/examples/dd_tutorial_ref/uart_vhdl/hdl
Executing data preparation plug-in for ModelSim 5.8 - 6.0
Performing compile...
Library TIMER_Vlog
Error: Could not find executables at C:\FPGAdvPersonal7SimLSPS\Hds/../Modeltech/win32.
Check that the ModelSim Compile Settings are set correctly.
Failed during ModelSim compile
Data preparation step completed, check transcript...
---------------------------------------------------------------------------------
"