Four Dimensional Array in Verilog

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Can anybody explain abt Four dimesional arrays ( Verilog)?...

Eg:
reg [1023:0] abc [7:0] [7:0] 7:0] 7:0]
 

in verilog i think you can not use multi dim. array

dont forget veilog is HDL no cpu high level language such as pascal or c ....
 

Multi-dimensional arrays are fine Verilog 2001 but not Verilog 1995. However, you omitted a few characters:
reg [1023:0] abc [7:0] [7:0] [7:0] [7:0];

Two practial problems:
1. Some synthesizer tools claim Verilog 2001 compatibility but still won't accept multi-dimensional arrays.
2. Your array has 4 trillion bits. Good luck even simulating that!
 

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