Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Formal Verification of Mentor

Status
Not open for further replies.

ljkong

Full Member level 2
Full Member level 2
Joined
Jul 18, 2002
Messages
123
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,296
Location
P.R.C
Activity points
763
Whole-Design Formal Verification of a
5-Million Gate Design by Equivalence
Checking Is Possible with a Small
Memory Footprint
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top