FOR LOOP in testbench

Hello there,

I needed help with test bench. I am using a FOR loop for my test bench to evaluate values that are stored in a text file inside a LUT.

Here’s my VHDL code:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
use STD.TEXTIO.ALL;
use IEEE.STD_LOGIC_TEXTIO.ALL;

Entity ROM_ent is
Port(
ADDR: IN std_logic_VECTOR(7 downto 0);
CLK: IN std_logic;
DATA: OUT std_logic_VECTOR(7 downto 0)
);
end ROM_ent;

Architecture Behavioral of ROM_ent is

type rom_type is array (255 downto 0) of std_logic_vector (7 downto 0);

impure function InitRomFromFile (RomFileName : in string) return rom_type is

FILE romfile : text is in RomFileName;
variable RomFileLine : line;
variable ROM : rom_type;
begin

for i in rom_type'range loop

readline(romfile, RomFileLine);
read(RomFileLine, ROM(i));

end loop;
return ROM;
end function;

Constant ROM : rom_type := InitRomFromFile("Doc1.Txt");

begin

process (CLK)
begin
if(CLK'event and CLK = '1') then
DATA <= ROM(to_integer(unsigned(ADDR)));
end if;
end process;


end Behavioral;


Can anyone please show me the code for my test bench with a FOR loop in it for the VHDL code above?or at least guide me please?

Thank you!

I dont quite understand. What you have posted is a ROM, not a testbench. Are you trying to write a testbench for your rom?

TrickyDicky said:

I dont quite understand. What you have posted is a ROM, not a testbench. Are you trying to write a testbench for your rom?

Click to expand...

Yes I have posted a ROM and I need help writing a testbench using a FOR loop. I find it difficult due to the text file approach in my ROM.

Can you please help show me the test bench with a FOR loop that has a text file implemented in a ROM?

Many thanks!!

A text file implemented in a rom? Or a rom implemented in a text file? And that was a serious question, given that this is a textbench question. For all I know this is a chinese whispers implementation of a testbench for a rom where the rom content is read from a file on your local friendly file system.

And if you really meant "text file implemented in a rom", what makes it a file instead of a regular boring old chunk of data in rom? Does it have a file header? Is there a file system stored on that rom?

Quick check of code ... "FILE romfile : text is in RomFileName;" .... aaah, chinese whispers it is. You say "A text file implemented in a rom" but you mean to say "A rom implemented in a text file". got it.

As for the for loop, I dunno. You just have a for loop that essentially is a counter looping over all the ROM addresses, then read the rom, and do some clever testbenchy verify-ey stuff with the data you just read from your rom?

Mr Flibble - what he has posted is a rom that is initialised from a text file using textio (this is compilable in Xilinx, but Altera doesnt support textio for initilising ROMs). What the OP is asking for is us to write his testbench for him.

OP: I suggest giving it a go to write your own testbench and come back when you're stuck.

TrickyDicky said:

Mr Flibble - what he has posted is a rom that is initialised from a text file using textio (this is compilable in Xilinx, but Altera doesnt support textio for initilising ROMs). What the OP is asking for is us to write his testbench for him.

OP: I suggest giving it a go to write your own testbench and come back when you're stuck.

Click to expand...

I was just being a bit pedantic. Chances were pretty good he had no filesystem on rom, but then pay attention to your word permutation alternatively known as a sentence. Although to be honest I wasn't quite sure what the OP's problem was. Since going by previous posts bachoo786 seems to at least try to do his own work. And the concept of "increment counter, read rom, compare read value to whatever" seemed a bit basic, so not sure if that was what he was asking...