Here is your standard fully diff. folded cascode op amp. Im using 0.18um technology, 1.8V supply. Im not getting the correct open loop output. My open loop gain is way tooo low. Cant even get a gain of 1. I know that all transistors should be operating in the saturation region. How do i go about setting all transistors to be in saturation? Do i set my bias voltages first and then adjust the W\L ratios? Its becoming a real nightmare to get this opamp working. Can anybody point me in the right direction. I have access to most analog circuit design texts if anybody wants to reference them. I have also attached my CMFB circuit.
Instead of giving the bias voltages as voltage sources(Vbp1,vbp2,vbn1,vbn2), use a complete current mirror circuit to generate the bias voltages and to define the exact current through each branch.
Take care in defining the currents in the branch by putting the multiplier.
It is better to debug the circuit without CMFB. connect in single ended output mode and get ur opamp working. Then u can convert to differential out with CMFB.
I agree with santhoshv78, you need a bias circuit rather than just supply a ref voltage! However, you can make it simpler by using transistor acting like active resistor by connecting Gate with Drain!
The main problem on your circuit is some of the transistors are not in saturation! Check your netlist@output file and track the problem transistor and force them to saturate!
check out all of the bias points, personally, I don't think the transistors are operated in saturation region. You'd better define the bias points first (some range) and then choose W/L. This procedure may need iterations for several time.
Pls, give me an example of extra bias circuit for this OpAmp or give me some useful links or literature. I mean cascode biasing with matching (insensitive to threshold voltage, mobility variations and eventually temperature). What is the methodology for bias setting in OpAmp design? Thank you.
First you define your bias current according to your power sepc, slew rate, relate your gain bandwidth and current to design paramter, the gm of the input transistor.
Biasing the circuit in voltage is not a good start, using current mirror. Even do a simple DC sweep for a single transistor to find out the bias current you need to set the transistor in saturation.
Thank you Edajason, but what about extra biasing with matching (insensitive to threshold voltage, mobility variations and eventually temperature)? Any literature or links ?