Flyback with small output capacitance

[cupoftea]

Hi,

We wish to make the attached 45W Flyback SMPS is small as possible. This flyback is on a little , vertical daughter board. Vin 48v, fsw 150khz, Vout 15v.

So we will reduce the output capacitance. That sure will make it smaller.

At the moment we have 5 pieces of 220uF, 35V electrolytics which are needed to handle the approx. 2.2A of AC output ripple current. This takes much room. So instead of all that , we will simply have a 10uF, 35V ceramic cap, and then a 470nH series inductor, and then , a 100uF electrolytic cap, which will be placed on the main board. (Also, certain load attachments will mean that the output capacitance alongside this 100uF electrolytic will be up to 1.5mF)

Anyway, I will use Hangsek Choi’s well known formula for the power stage transfer function incorporating the output LC post-filter as described. But as you can see from the attached , it’s a big lot to do in excel, so I will have to wait a few days before sitting down to number crunch.

In the meantime, has anyone else done a spot of output cap “bashing” like this? How was it for you?

LTspice and jpeg as attached

 

[cupoftea]

The attached feedback loop calc doc (all available freely off the web) shows how the post LC filter etc can be proven, but itll take me a few hours to put this together for this case…still, it amazes me why many OTS SMPS don’t do this electrolytic cap bashing?

 

[KlausST]

Hi,

Just my thoughts, without prove or simulation.

if my calculation is correct, then you get a resonance frequency of 77kHz ... on a 150kHz switching regulator.

That´s close. I can imagine that this may work under ideal conditions. (continusly switching, stable load)
But what happens at start up, or on very light loads, or on overcurrent ...

What I want to say: Pulse skipping surely is not allowed, because if you skip every second pulse (I guess this is worst case) then you are almost perfectly in undamped resonance. In resonance the currents become high, the voltage amplitude could be way higher than the switching node amplitude.

Also you need to ensure that your regulation loop is stable under all conditions.
I guess you can´t do the voltage feedback from the first capacitor, and when using the second capacitor´s voltage as feedback it includes some phase shift.

The output current is 3A. With 150kHz you have a period time of 6.6us. So if I calculate with best case of 50% duty cycle, then the 10uF capacitor needs to handle a 6A (avg current) over 3.3us. Then the voltage rise should be V = I * t / c = 6A * 3.3us / 10uF = 2V

Again: no prove in this values. Just my thoughts.

Klaus