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Flyback Reflected Voltage

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Xavier Pacheco Paulino

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Hello,

I'm looking into this reference design: https://www.ti.com/lit/df/tidrlf7/tidrlf7.pdf .

I have three questions:

1) What could be the reflected voltage? I see D1 is 110V, so it leads me to think they chose a low reflected voltage for this wide input range (64-1260VDC). This is what I think:

With two 800 V mosfets, we should leave at least 100V safety margin when at max voltage. So, we don’t want to exceed 700V on each drain, i.e., in total 1.4kV.

Vinmax + Vz = 1400 + Vz <=1200

Vz <=1400 – 1200 = 200V

Let’s pick Vz = 110V

Vz/VOR = 1.4 optimum ratio

VOR =0.7*110 = 77 Is this Okay?

2) How is the voltage shared between the two transistors? Is there a moment when a transistor could get more stress than the other?

3) They don't use bulky capacitors at the rectifier output. Is not ripple an issue then?
 

Most of your questions are answered in the PMP10195 test results at ti.com. See www.ti.com/tool/PMP10195 Unfortunately the transformer winding ratio isn't specified, but you can guess it from the Vds measurements with low input voltage.
 

the 1kv+ is just for transients...3 phase mains peak is just 240*sqrt(2) * sqrt(3) = 587v

No, you can never get all the voltage across one fet and zero on the other....as soon as the bottom fet has 600v on it, then the top fet is turned off.

Three phase rectifier ripple is much less than single phase ripple....so no big caps are needed
 

the 1kv+ is just for transients...3 phase mains peak is just 240*sqrt(2) * sqrt(3) = 587v
Obviously the power supply is designed to support higher mains voltage like 690 V phase-to-phase, used in higher power industrial networks.
 

Hello,

I'm looking into this reference design: https://www.ti.com/lit/df/tidrlf7/tidrlf7.pdf .

I have three questions:

I guess it's a supply for control circuitry of a generator.
The reflected voltage is 10 to 15V. Since the load on the 24V and the feedback winding is constant the switch on time vary when the high voltage vary.
The caps are small because of the high frequency.
The voltage on the mosfets can be very different. The 2 x 300V zeners limit the drain voltage of the bottom mosfet to max 600V.
 
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