Flux walking detection

I believe the "flux-reset" stuff is more confusing than helpful. The suggestions don't seem to refer to the given bridge topology.

In simple terms, there's no need to reset flux for a symmetrical AC modulation. You neither do with a transformer connected to the mains power.

With symmetrical waveforms you are quire correct. But PWM isn't necessarily limited to a max of 50% duty cycle, and that may be where the problem is arising.
Correct me if I'm wrong (and I may be!), but sinewave synthesis by PWM means that the PWM duty cycle changes throughout the 50/60Hz half-cycle. Min duty cycle near the zero crossing points and max duty cycle near the peak of the sinewave. In order for flux walking not to occur the transformer off time must never be shorter than the on time for a carrier (switching) frequency half-cycle. But that may well occur near the peak of the sinewave where wide duty cycles are demanded. The control algorithm obviously has to limit the duty cycle to 50% or less, even at the sinewave peak.

FvM said:

In a state-of-the-art H-bridge design, asymmetries are low enough to avoid saturation also without a dedicated DC current/voltage correction controller.
- more likely, core saturation is brought up by problems in the pwm controller. In this case, a DC sense circuit won't help either. Instead need to fix the pwm control algorithm.

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Many thanks, @FvM!.. that's what actually happened.

While I was connected with my laptop to the inverter's MCU, I've realized that those 3 second buzzing pulses were synchronized with the MCU serial data printing!

I wrote a software routine to send some data (inverter status, output voltage, DC-link current) over serial port. Although that was not supposed to influence the PWM generation (hardware timers) it actually does.

I have to double check all the code to find out why (maybe there are some interrupt conflicts or something).

For now, I have disabled the serial communication and the noise has almost disappeared. There is some increased noise (but with constant amplitude) while a motor is running (my fridge compressor), but I guess that's ok.

(and I still have a problem with the voltage control loop. It does react too quick to voltage (load) changes, I presume.)

FvM said:

"Reset" of flux asymmetries also happens during bridge dead-time. But you want to keep dead-time low to avoid respective waveform distortions with reactive load.

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I have a dead time of 300ns but, as you were saying, I'd like to keep it low.

In order for flux walking not to occur the transformer off time must never be shorter than the on time for a carrier (switching) frequency half-cycle.

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Sorry, I can't follow your considerations.

With maximum modulation, the duty cycle of each half bridge is varying between 0 and 100 percent. For DC free output, the average duty cycle of left and right half bridge must be equal, e.g. 50 percent.

Consider that the applied unipolar pwm scheme implements synchronous switching, means each bridge leg is either connected to DC+ or DC- but not free-wheeling (except during short dead-times).

I wrote a software routine to send some data (inverter status, output voltage, DC-link current) over serial port. Although that was not supposed to influence the PWM generation (hardware timers) it actually does.

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Good you found it. I presume with proper interrupt programming, serial communication should not affect pwm generation.

Hi,

I believe the "flux-reset" stuff is more confusing than helpful.

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I see your point - at least for continous operation.


**
In an application "switch ON a transformer with 8kVA / 480V" I saw current peaks (half wave) going way up obove 100A - with no load. Sometimes causing a 32A fuse to trigger.
The problem was remanence in the core in combination at wich time of the sine the mains was switched ON.

I solved it with a TRIAC circuit. Synchronously increasing ON phase angle of both halfwaves. Additionally i checked both halfwaves current and compared each other.
In case they differ i made the phase angle unsymmetric to compensate for this.
From 0 to 100% phase angle it takes about half a second.
I checked switch ON current many times, I didn´t recognize it to come above 500mA (before it wa 50A!) while the no load continous current is about 450mA.

After the 500ms a relay short circuited the triac and the flux compensation was not active anymore.

****

I agree that the design should ensure to avoid DC current in a transformer. But at power up a flux compensation could help to start.

Klaus

Klaus I've seen similar problems. Extremely high inrush currents on transformers.

But I solved them the cheap and easy way. I added a NTC thermistor (rated for surge currents) which is short circuited away with a relay after a pair of seconds.

FvM said:

Consider that the applied unipolar pwm scheme implements synchronous switching, means each bridge leg is either connected to DC+ or DC- but not free-wheeling (except during short dead-times).

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That's the algorithm I'm using, indeed. And the SPWM signal is absolute identical for every pair of positive and negative half waves (as the PWM attenuation is changed at the begining of positive half wave only).

But what could be the influence of load changing (especially of an inductive one)? May it affect only a half wave, thus the symmetry of the generated PWM signal wouldn't help?

I agree that transformer inrush current is a partly related topic, although not yet addressed in this thread about 50 Hz inverter operation.

For an inverter it's rather easy to start the first sine wave at the peak to keep∫Vdt DC free. Or increase the AC magnitude rampwise.

- - - Updated - - -

But what could be the influence of load changing (especially of an inductive one)? May it affect only a half wave, thus the symmetry of the generated PWM signal wouldn't help?

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The only situation where the load actually can promote transformer saturation is if it consumes DC current, e.g. a half-wave rectifier or a triac switching an asymmetrical number of half waves. Reactive load doesn't cause problems, just keep the sine modulation strictly.

I have no problem with the inrush current at all and I have a big (5kW) toroidal transformer. I've just followed @FvM suggestions above and the start-up current is comparable with the idle one.

I still have a (perception?) problem with the PWM signal generation.
As you know, the PWM duty-cycle is smaller around the voltage zero crossing point, where the transformer primary current is supposed to reach its peak value.

When the DC-link voltage reaches its upper boundary (62VDC, being a 48VDC/230VAC inverter), the Mosfet's ON time around voltage zero-crossing point could be as short as the dead time (300ns).

That means the Mosfet switch could be turned ON for only 100-200ns or so. If the primary current is at its highest value (100A), that's a hell of a Mosfet hard-switching.

To avoid that, I put a conditional test inside the PWM generation routine. That's it, if the ON time is lower than 600ns, I'll make it 600ns exactly.

That means the sine wave get distorted a little bit around the voltage zero crossing point. But that's applied to both half waves thus it should not affect the flux balance.

Is there any problem with the algorithm above?.. or should I let the Mosfets switch 100Amps for 100-200ns?

I fear, I don't exactly understand the problem description.

In standard unipolar pwm, zero output voltage is associated with 50 percent duty cycle of both half bridges. Minimal/maximal duty cycle occurs at voltage maxima, depending on the modulation index.

Sorry, this is the SPWM algorithm I'm using:



So, while one bridge's leg is tied to ground (during a half wave), the other leg is driven with a PWM signal having a duty cycle of 0-100%.

(at zero crossing point, you have the smaller duty cycle)

What type of transformer and core material are you using?

I suspect it may be a tape wound toroid, which are notorious for core saturation problems, even when driven from nice symmetrical 50Hz ac.

At least it is not blowing up your bridge, which unfortunately, is all too common.

This really needs a Hall effect sensor in the primary, with just one pass through the central hole, that will very effectively monitor the current waveform, along with any residual asymmetry.

Then you can use that to make very slight running changes to the PWM on an alternate half cycle basis, to slowly correct any growing asymmetry before it becomes too serious..

It may be easier in software to just skip one high frequency turn on during the PWM sequence, rather than attempt full blown trimming of the whole half cycle PWM amplitude.

That should give very fine control, especially if you do it near the zero crossing.

I originally thought that the core was ferrite but at 8kW (and 6.4kHz) it almost certainly isn't.
If the core is silicon steel then the transformer can obviously cope with a much higher peak flux density (1.8T) than a ferrite (0.33T) and may not saturate with the flux walking that occurs near the peak of the sinewave. The bridge arrangement that is being used will not allow the core to reset between cycles and it will indeed walk up the BH loop. If you pulsed it like a normal full bridge is driven (ie Diagonal switches on only and others off) then the core would be able to reset during the off time. But since you hold the two lower MOSFETs on the core is trying to reset into a short circuit and the di/dt is so shallow that it cannot empty itself of flux. The result is that the next switching cycle starts off with almost the same current as it ended with and the currents builds up from one cycle to the next. All this "reset"stuff is actually quite important!

RichardHead said:

The bridge arrangement that is being used will not allow the core to reset between cycles and it will indeed walk up the BH loop. If you pulsed it like a normal full bridge is driven (ie Diagonal switches on only and others off) then the core would be able to reset during the off time.

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The PWM algorithm is applied _symmetrically_ to both bridge legs hence there should be no flux imbalance at all.

RichardHead said:

But since you hold the two lower MOSFETs on the core is trying to reset into a short circuit and the di/dt is so shallow that it cannot empty itself of flux. The result is that the next switching cycle starts off with almost the same current as it ended with and the currents builds up from one cycle to the next. All this "reset"stuff is actually quite important!

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Even if the flux it's not reseting completely during dead time, it does it on the next half wave generation (the flux is symmetrically reversing).

BTW, the image I've posted above (the unipolar SPWM algorithm) belongs to a Texas Instruments datasheet so I doubt the topology is based on a wrong theory.


@Warpspeed, I presume you are talking about Hall effect current sensors, right? Do you think of averaging some amount of current samples during each half wave then comparing the results?

Well, I guess I'll try the simpler method first (as Klaus has suggested, I'm going to use a low pass filter to extract the DC bias voltage from the primary circuit).

In the mean time, I'm going to rewrite the whole PWM algorithm from scratch to make sure it's not a software problem.

kathmandu said:

Sorry, this is the SPWM algorithm I'm using:

View attachment 129071

So, while one bridge's leg is tied to ground (during a half wave), the other leg is driven with a PWM signal having a duty cycle of 0-100%.

(at zero crossing point, you have the smaller duty cycle)

Click to expand...

I see what you are doing. But that's not the usual way to generate unipolar pwm. Instead you'll switch both half bridges in phase with complementary duty cycle, e.g 49 and 51 percent. Advantage compared to your method is that switching loss is equally distributed and each transistor is switching at half the pwm output frequency. Disadavantage is that simple microprocessors don't have the resources to generate it easily.

Apart from the said point that small output voltages may be distorted, your method is of course correct unipolar pwm.

I keep thinking that the flux reset discussion is missing the point.

Even if the flux it's not reseting completely during dead time, it does it on the next half wave generation (the flux is symmetrically reversing).

That is true and is fine if you core has sufficient flux headroom to cope with multiple flux excursions in the same direction, but that will require a core material with a high flux density capability and that rules out any high freq material. So you are stuck with a lossy silicon steel transformer that is essentially a 50/60Hz transformer with PWM.

No idea what you mean with "multiple flux excursions in the same direction". No matter how the pwm waveform looks in detail, the transformer has to be designed for 50 Hz AC voltage. So usually some kind of Fe or FeNi alloy core will be used.

The 50 Hz AC flux can only "reset" over the 50 Hz cycle, that's the operation principle of a transformer. Inverter dead-time still plays a role because it helps to reset residual flux caused by hardware or software created imbalance.

FvM said:

But that's not the usual way to generate unipolar pwm. Instead you'll switch both half bridges in phase with complementary duty cycle, e.g 49 and 51 percent. Advantage compared to your method is that switching loss is equally distributed and each transistor is switching at half the pwm output frequency. Disadavantage is that simple microprocessors don't have the resources to generate it easily.

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Thanks, @FvM! Could you suggest some literature of this unipolar algorithm (or could you post a diagram of how the four gate signals should look like)?

My MCU it's quite capable, it could easily generate four independent PWM signals or two complementary pairs of independent PWM pulses.

@RichardHead:

Yes, I'm using a sillicon steel tape wound toroid transformer (50Hz, 5kVA) having a Bmax of 1.8T.

Kathmandu
Ok, so you are basically using a 50Hz transformer that you are PWMing. There are other ways of doing it at high frequency using ferrites and I wasn't sure which way you were doing it. If you were using a ferrite transformer(s) then the control algorithm you are using wouldn't work due to the aforementioned flux walking issue.
If you do it at high freq (+/- 50Khz say) then ferrites are mandatory for several reasons. With a high operating freq and a ferrite transformer(s) the magnetics size/volume drops drastically compared to the 50Hz solution.