FIXING DRV AFTER ROUTE ?

[bschaitanya]

Hi guys ,

Even having the huge positive margin (+93ps) why I am getting the cap and tran violation ?

After routing how to fix cap and tran violations ?


I have used the cmd in encounter that
> optDesign -postRoute -drv

In reports it showing some number of violation paths but by generating the cmd
>reportTranviolation
>reportCapviolation it showing another number of violation paths(high in number)

Finally I am unable to clear those violation .
Is there any manual process to get clear those errors.

 

[jbeniston]

Try adding buffers manually.

 

[bschaitanya]

that further contribute to load right that means increasing the cap. right..

 

[cop02ia]

Hi,

I don't think it contributes to load on output pin because the load is not cumulative of all connecting level of gates, just the curent level, right?
The buffer handles the big load while the failing pin now handles only the load generated by the buffer.

Anyway, how about manually upsizing/downsizing cells? This uses less space.

Best Regards.

 

[rca]

if you have access to primetime and dc tool, you can "script" this step.

during the STA, you check the violation and you can add the buffer to check the unviolation, and primetime can generate a script for DC to really add this buffer in the netlist.

in DC, you apply this script to add the buffer.

after in the place&route tool you made an ECO step to automaticly add the buffer and route.

 

[bschaitanya]

Ya I tried out through interactive ECO by upsizing the driver .
Its worked.
thank you

 

[cop02ia]

Hi,

Just a reminder - in SoC Encounter Interactive ECO, the 'Eval All' function can check which cell you would deem appropriate to upsize/downsize to before committing to it.

Best regards.