Fixed Point division in VHDL

[info_req]

Hello dear,
I need algoritm/ guideline on fiexed point division in vhdl.
Secodnly, how to check that in how many cycles FPGA performs an operation(i.e. +, -, / etc.).

 

[ddt694]

'paper and pencil' method is easy to design
you can google it

 

[ddboy40]

Hello dear,
I need algoritm/ guideline on fiexed point division in vhdl.
Secodnly, how to check that in how many cycles FPGA performs an operation(i.e. +, -, / etc.).

we al know the pensil and paper method. Can someone explain to us/me how to check the number of cycles an algorithm needs ?
thanks in advance.

 

[vfdff]

can't be used lmp in stand ??

 

[rrrrr12345]

There're a lot of algorithms available for division in Hardware.

Try the Newton Raphson Algorithms.