FIRMWARE Developed in FPGA and verification framework for the firmware in system ver

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Anna_fpga

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Hi all,
I am new to verification framework development for FIRMWARE in Systemverilog . The firmware has been developed in VHDL.

Does the firmware and the verification environment can be written in different languages?

Does the verification framework developed in systemverilog could understand the firmware written in vhdl?

Please help me

Thanks
Anna
 

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