FIR IP core dosen't work properly

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mohsen68sh

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Hello all,
i am trying to use a FIR IP core 5 in spartan3.
i designed and quantized filter in matlab and used core generator to create it.
i want my system to work in 40MHz clock frequency and 10 MHz input sampling frequency. input and output should be 12 bit.
i changed all the parameters but the output of simulation always look weird!!
when i look at the output, i think that it looks like the input but FIR filter cuts down both sides of input.
any help is appreciated.



my test bench is here (i know its unprofessional)

Code Verilog - [expand]
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module FIR_tb;
 
    // Inputs
    reg clk;
    reg [11:0] data_in;
    reg [11:0] d_in [0:198];
   integer index;
    integer f;
    // Outputs
    wire [11:0] data_out;
 
    // Instantiate the Unit Under Test (UUT)
    main_FIR uut (
        .clk(clk), 
        .data_in(data_in), 
        .data_out(data_out), 
        .rfd(rfd), 
        .rdy(rdy)
    );
 
    initial begin
        // Initialize Inputs
        #100;
        clk = 0;
        data_in = 0;
        f=$fopen("D:\output.txt");
        $readmemh("C:\detout_hex.txt",d_in);
        index = 0;
        end
    
        always @(clk)
        begin
        clk <= #12.5 ~clk;
        end
        always @(posedge rfd)
        begin
        data_in = d_in[index];
        index=index+1;
        $fmonitor(f,"%d",data_out);
        end
      
        
endmodule
 
Last edited by a moderator:

It looks like that you did not convert the output values to signed values. if ouput is 12 bit signed then the
maximum value could be 2047 not 4000 ...
change the signal values to signed in vhdl simulator and then write to file or use code like below in MATLAB to correct values.
Code: 
for i=1:length(Out)
  if (Out(i)>=2048)
    Out(i) =  Out(i) -4096;
  end;
end;
 
thank you for response
it is signed output
again FIR filter cuts down the output near 60 and 120.
can you see the problem?!!

 

Not even clear what Figure1 is showing. No annotation at all.
 

it is the output of FIR filter core in the signed mode.
I put here the images about filter design,input and output.
 

it seems to be an overflow.
by this description and images it's not easy to say where is the problem but u can check some points.

try answering this questions:
1) how do u converted coefficients from MATLAB to be used in FIR Core. is FIR parameters selected carefully? plz place the XCO file to be discussed.
2) how do you truncated 32 bit output of FIR to 12 bit?
 

1) i used matlab's fdatool to quantize designed filter and created .COE file for fir core.
i put 4 images of designed filter and quantization process here.



i give you my whole simulation folder as a zip file
View attachment FIR.rar

here is my input file
View attachment detout_hex.txt

and its my matlab file for reading the output
View attachment reader.txt

2) i do not know details but it should truncate LSBs
 

Look at your input file!
There is some negative values (like ....A47,AB9,...) that are not compatible with your input signal figure.

check the code making input signal. consider that a 12 bit signed maximum value is 2^11-1 = 1023.
 

Hi,

check the code making input signal. consider that a 12 bit signed maximum value is 2^11-1 = 1023.
Click to expand...
I´d say: 12 bit signed range is -2048 .....0 .....+2047

Klaus
 

Excuse me. 2^11-1 = 2047
 

Port Map said:
Look at your input file!
There is some negative values (like ....A47,AB9,...) that are not compatible with your input signal figure.

check the code making input signal. consider that a 12 bit signed maximum value is 2^11-1 = 1023.
Click to expand...

Hi,
and thank you so much
the problem was from my input file as you said :|

it is true output


thank you again:grin:
 

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