FinFET detailed documents

[shreya_ec]

hii ,

do anyone have good docs with detailed description of FinFET TECHNOLOGY?


THANKS IN ADVANCE.

 

[vineeth_gk]

hi i would suggest you to go through the textbook 'J.-P. Colinge FinFETs and Other Multi-Gate Transistors' .It gives an insight of the nedd of finfet technology in the current scenario as well the complete modelling of the device.

 

[ljp2706]

Are you looking for process or design related documentation?

 

[shreya_ec]

i am looking for both of them as i want to work on its layout so firstly i want to understand about finfet in detail .

 

[ljp2706]

Private message me if you want a detailed 120 page powerpoint on how FinFET devices are manufactured and their device structures.

This link is a thesis that has some information on a bandgap design in a FinFET process, but it also has some general comments on FinFET devices and tradeoffs:
https://scholarworks.rit.edu/cgi/viewcontent.cgi?article=10562&context=theses

If you look on IEEE or a similar site, you'll be able to find a lot of designs done in vertical gate processes. As far as references go for device physics of vertical gate FETs, I have a lot more than what I listed below, but these are my favorites:

K. Suzuki, Y. Tosaka, and T. Sugii, “Analytical threshold voltage model for short channel n+–p+ double-gate SOI MOSFETs,” IEEE Trans. Electron Devices, vol. 43, pp. 732–738, May 1996.

Y. Taur, “An analytical solution to a double-gate MOSFET with undoped body,” IEEE Electron Device Lett., vol. 21, no. 5, pp. 245–247, May 2000.

Y. Taur, X. Liang, W. Wang, and H. Lu, “A continuous, analytic drain-current model for DG MOSFETs,” IEEE Electron Device Lett., vol. 25, no. 2, pp. 107–109, Feb. 2004.

Z. Lu and J. G. Fossum, "Short-Channel Effects in Independent-Gate FinFETs," in IEEE
Electron Device Letters, vol. 28, no. 2, pp. 145-147, Feb. 2007.

P. Magnone, F. Crupi, A. Mercha, P. Andricciola, H. Tuinhout and R. J. P. Lander,
"FinFET Mismatch in Subthreshold Region: Theory and Experiments," in IEEE
Transactions on Electron Devices, vol. 57, no. 11, pp. 2848-2856, Nov. 2010.

S. D. Pable, A. Imran and M. Hasan, "Performance investigation of DG-FinFET for subthreshold applications," Multimedia, Signal Processing and Communication Technologies (IMPACT), 2011 International Conference on, Aligarh, 2011, pp. 16-19.


Lastly, as far as I'm aware, I don't have any layout tutorials/references that would be okay for me to share.