I am intending to design a current steering DAC, in Cadence Virtuoso and i use the tech lib : UMC180. I intend to design the DAC for a specific DNL, for which i need to know, the mismatch parametrics, namely Avt and Abeta. I tried printing the DC operating point in results menu, but it doesnt give these data. Is there a way in cadence to extract these info ?
Mismatch parameters are process specific and have to be given by the fab/foundry. They should be available within their SPICE/SPECTRE simulation models in their PDK.