the_falcon
Member level 4
Hi all,
I am trying to find Ft in cadence for just a single PMOS transistor and I am not able to do it so far. I am using a single PMOS, a DC voltage source Vdc , one in drain and one in gate for biasing and also an DC current source idc acm parameter as 1 A . this current source is in series with my DC voltage source for gate.
I ran an ac analysis and tried to find the current ratio between drain and gate through calculator. then i tried to plot it against frequency. I am sure that the graph is wrong.
so could anyone tell me as how to plot this one in a right way.many thanks in advance.
falcon
I am trying to find Ft in cadence for just a single PMOS transistor and I am not able to do it so far. I am using a single PMOS, a DC voltage source Vdc , one in drain and one in gate for biasing and also an DC current source idc acm parameter as 1 A . this current source is in series with my DC voltage source for gate.
I ran an ac analysis and tried to find the current ratio between drain and gate through calculator. then i tried to plot it against frequency. I am sure that the graph is wrong.
so could anyone tell me as how to plot this one in a right way.many thanks in advance.
falcon